XC3S200AN-4FT256I Xilinx Inc, XC3S200AN-4FT256I Datasheet - Page 10

• Manufacturer Part Number: XC3S200AN-4FT256I
• Description: IC FPGA SPARTAN 3AN 256FTBGA
• Manufacturer: Xilinx Inc
• Series: Spartan™-3ANr

Specifications of XC3S200AN-4FT256I

• Number Of Logic Elements/cells: 4032
• Number Of Labs/clbs: 448
• Total Ram Bits: 294912
• Number Of I /o: 195
• Number Of Gates: 200000
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 256-LBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

DS557 (v4.1) April 1, 2011
Spartan-3AN FPGA Design Documentation
The functionality of the Spartan®-3AN FPGA family is
described in the following documents. The topics covered in
each guide are listed below:
•
•
•
© Copyright 2007–2011 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, and other designated brands included herein are trademarks of Xilinx in the United States and
other countries. PCI and PCI-X are trademarks of PCI-SIG and used under license. All other trademarks are the property of their respective owners.
DS557 (v4.1) April 1, 2011
Product Specification
DS706: Extended Spartan-3A Family Overview
UG331: Spartan-3 Generation FPGA User Guide
•
•
•
•
•
•
•
•
•
•
•
•
•
•
UG332: Spartan-3 Generation Configuration
User Guide
•
•
•
•
•
Clocking Resources
Digital Clock Managers (DCMs)
Block RAM
Configurable Logic Blocks (CLBs)
-
-
-
I/O Resources
Embedded Multiplier Blocks
Programmable Interconnect
ISE
IP Cores
Embedded Processing and Control Solutions
Pin Types and Package Overview
Package Drawings
Powering FPGAs
Power Management
Configuration Overview
-
-
Detailed Descriptions by Mode
-
-
-
-
-
-
-
ISE iMPACT Programming Examples
MultiBoot Reconfiguration
Design Authentication using Device DNA
®
Distributed RAM
SRL16 Shift Registers
Carry and Arithmetic Logic
Configuration Pins and Behavior
Bitstream Sizes
Master Serial Mode using Xilinx® Platform
Flash
Master SPI Mode using SPI Serial Flash
PROM
Internal Master SPI Mode
Master BPI Mode using Parallel NOR Flash
Slave Parallel (SelectMAP) using a Processor
Slave Serial using a Processor
JTAG Mode
Design Tools
11
www.xilinx.com
•
Create a Xilinx user account and sign up to receive
automatic e-mail notification whenever this data sheet or
the associated user guides are updated.
•
Spartan-3AN FPGA Starter Kit
For specific hardware examples, please see the
Spartan-3AN FPGA Starter Kit board web page, which has
links to various design examples and the user guide.
•
•
UG333: Spartan-3AN FPGA In-System Flash User
Guide
•
•
•
•
•
•
•
Sign Up for Alerts on Xilinx.com
https://secure.xilinx.com/webreg/register.do?group=my
profile&languageID=1
Spartan-3AN FPGA Starter Kit Board Page
http://www.xilinx.com/s3anstarter
UG334: Spartan-3AN FPGA Starter Kit User Guide
For FPGA applications that write to or read from
the In-System Flash memory after configuration
SPI_ACCESS interface
In-System Flash memory architecture
Read, program, and erase commands
Status registers
Sector Protection and Sector Lockdown features
Security Register with Unique Identifier
Spartan-3AN FPGA Family:
Functional Description
Product Specification
10