XR17V352IB-0A-EVB Exar Corporation, XR17V352IB-0A-EVB Datasheet - Page 30

• Manufacturer Part Number: XR17V352IB-0A-EVB
• Description: EVAL BOARD FOR XR17V352 113BGA
• Manufacturer: Exar Corporation

Specifications of XR17V352IB-0A-EVB

• Main Purpose: Interface, UART
• Embedded: -
• Utilized Ic / Part: XR17V352
• Primary Attributes: -
• Secondary Attributes: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

XR17V352
HIGH PERFORMANCE DUAL PCI EXPRESS UART
The THR and RHR register address for channel 0 to channel 1 is shown in
for each channel 0 to 1 are located sequentially at address 0x0000 and 0x0200. Transmit data byte is loaded to
the THR when writing to that address and receive data is unloaded from the RHR register when reading that
address. Both THR and RHR registers are 16C550 compatible in 8-bit format, so each bus operation can only
write or read in bytes.
2.2
Data Bit-31
PCI Bus
B7 B6 B5 B4 B3 B2 B1 B0
FIFO DATA LOADING AND UNLOADING THROUGH THE UART CHANNEL REGISTERS, THR
AND RHR IN 8-BIT FORMAT
Transmit Data Byte n+3
T
ABLE
10: T
CH0 0x0000 Read THR
CH0 0x0000 Write RHR
CH1 0x4000 Read THR
CH1 0x4000 Write RHR
RANSMIT AND
Channel 0 to 1 Transmit Data in 32-bit alignment through the Configuration Register Address
THR and RHR Address Locations For CH0 to CH1 (16C550 Compatible)
B7 B6 B5 B4 B3 B2 B1 B0
Transmit Data Byte n+2
R
ECEIVE
Bit-7
Bit-7
Bit-7
Bit-7
D
ATA
Bit-6
Bit-6
Bit-6
Bit-6
0x0100 and 0x0500
R
EGISTER IN
30
Bit-5
Bit-5
Bit-5
Bit-5
B7 B6 B5 B4 B3 B2 B1 B0
Bit-4
Bit-4
Bit-4
Bit-4
Transmit Data Byte n+1
B
YTE FORMAT
Bit-3
Bit-3
Bit-3
Bit-3
Bit-2
Bit-2
Bit-2
Bit-2
Table 10
, 16C550
Bit-1
Bit-1
Bit-1
Bit-1
B7 B6 B5 B4 B3 B2 B1 B0
below. The THR and RHR
Bit-0
Bit-0
Bit-0
Bit-0
Transmit Data Byte n+0
COMPATIBLE
REV. 1.0.1
Data Bit-0
PCI Bus