XRD9836ACG Exar Corporation, XRD9836ACG Datasheet - Page 18

• Manufacturer Part Number: XRD9836ACG
• Description: IC 16B CCD/CIS SIG PROC 48TSSOP
• Manufacturer: Exar Corporation

Specifications of XRD9836ACG

• Package / Case: 48-TSSOP (0.240", 6.10mm Width)
• Number Of Bits: 16
• Number Of Channels: 3
• Power (watts): 500mW
• Voltage - Supply, Analog: 3 V ~ 3.6 V
• Voltage - Supply, Digital: 3 V ~ 3.6 V
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Contains lead / RoHS Compliant

XRD9836
16-BIT PIXEL GAIN AFE
REV. 1.0.0
N
BLUE DYNAMIC
APOAM GREEN
APOAM GREEN
OTE
RED DYNAMIC
APOAM BLUE
FINE OFFSET
FINE OFFSET
APOAM BLUE
FINE OFFSET
GREEN FINE
APOAM RED
APOAM RED
CNTRL/POL
BLUE FINE
RED FINE
DELAY C
DYNAMIC
DYNAMIC
DYNAMIC
DYNAMIC
DELAY D
DELAY A
DELAY B
OFFSET
OFFSET
OFFSET
OFFSET
OFFSET
OFFSET
OFFSET
OFFSET
OFFSET
GREEN
GREEN
: Note: Shaded cells represent unused bits
MODE
BLUE
TEST
RED
PGA
PGA
PGA
A
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
ADDRESS
A
3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
A
2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
A
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
A
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
GDOFF
ARDOF
AGDOF
RDOFF
BDOFF
RFOFF
GFOFF
BFOFF
ABDOF
ARFOF
AGFOF
ABFOF
change
GPGA
RPGA
BPGA
do not
D9
[9]
[9]
[9]
[9]
[9]
[9]
[9]
[9]
[9]
[9]
[9]
[9]
[9]
[9]
[9]
RDOFF
GDOFF
BDOFF
ARDOF
AGDOF
ABDOF
ARFOF
AGFOF
ABFOF
GF0FF
change
RF0FF
BF0FF
RPGA
GPGA
BPGA
do not
D8
[8]
[8]
[8]
[8]
[8]
[8]
[8]
[8]
[8]
[8]
[8]
[8]
[8]
[8]
[8]
RDOFF
GDOFF
ARDOF
AGDOF
ABDOF
AGFOF
BDOFF
RFOFF
GFOFF
BFOFF
ARFOF
ABFOF
DelayC
DelayD
NOFS2
change
DelayA
DelayB
RPGA
GPGA
BPGA
do not
ADC
D7
POL
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
REGISTERS
Table 2:
18
ENABLE
RDOFF
GDOFF
ARDOF
AGDOF
ABDOF
BDOFF
ARFOF
AGFOF
ABFOF
LCLMP
DelayC
DelayD
change
RF0FF
GF0FF
BF0FF
DelayA
DelayB
RPGA
GPGA
BPGA
do not
TEST
D6
POL
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
SELECT
RDOFF
GDOFF
ARDOF
AGDOF
ABDOF
AGFOF
BSAMP
BDOFF
RFOFF
GFOFF
BFOFF
ARFOF
ABFOF
DelayC
DelayD
change
DelayA
DelayB
GPGA
RPGA
BPGA
do not
GAIN
D5
POL
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
D
ATA BITS
CCD/CIS
RDOFF
GDOFF
ARDOF
AGDOF
ABDOF
VSAMP
BDOFF
RFOFF
GFOFF
BFOFF
ARFOF
AGFOF
ABFOF
DelayC
DelayD
change
DelayA
DelayB
RPGA
GPGA
BPGA
do not
D4
POL
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
GDOFF
ARDOF
AGDOF
RDOFF
BDOFF
RFOFF
GFOFF
BFOFF
ABDOF
ARFOF
AGFOF
ABFOF
Disable
DelayC
DelayD
change
DelayA
DelayB
GPGA
RPGA
BPGA
CHAN
do not
D3
DLP
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[1]
PwrDwn
GDOFF
ARDOF
AGDOF
RDOFF
BDOFF
RFOFF
GFOFF
BFOFF
ABDOF
ARFOF
AGFOF
ABFOF
change
DelayA
DelayB
DelayC
DelayD
GPGA
RPGA
BPGA
CHAN
do not
D2
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[0]
xr
xr
GDOFF
ARDOF
AGDOF
APOAM
RDOFF
BDOFF
RFOFF
GFOFF
BFOFF
ABDOF
ARFOF
AGFOF
ABFOF
change
DelayA
DelayB
DelayC
DelayD
RPGA
GPGA
BPGA
do not
OEB
D1
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
GDOFF
ARDOF
AGDOF
RDOFF
BDOFF
RFOFF
GFOFF
BFOFF
ABDOF
ARFOF
AGFOF
ABFOF
RESET
change
DelayA
DelayB
DelayC
DelayD
GPGA
RPGA
BPGA
do not
GOM
D0
[0]
[0]
[0]
[0]
[0]
[0]
[0]
[0]
[0]
[0]
[0]
[0]
[0]
[0]
[0]
[0]
[0]
[0]
[0]