PN5310A3HN/C203,55 NXP Semiconductors, PN5310A3HN/C203,55 Datasheet - Page 6
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PN5310A3HN/C203,55
Manufacturer Part Number
PN5310A3HN/C203,55
Description
IC TRANSMISSION MOD 40-HVQFN
Manufacturer
NXP Semiconductors
Datasheet
1.PN5310A3HNC20351.pdf
(19 pages)
Specifications of PN5310A3HN/C203,55
Rf Type
Read / Write
Frequency
13.56MHz
Features
ISO14443A / Mifare
Package / Case
40-VFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
935280844551
PN5310A3HN/C203-S
PN5310A3HN/C203-S
PN5310A3HN/C203-S
PN5310A3HN/C203-S
Philips Semiconductors
PN531
2 BLOCK DIAGRAM
2.1 Simplified PN531 Block Diagram
The Analog circuitry handles the modulation and demodulation of the analog signals according to the card
mode, reader /writer mode and NFC mode communication scheme.
The RF level detector detects the presence of an external RF field at 13.56 MHz.
The mode detector detects a MIFARE®, FeliCa
the internal receiver to demodulate signals that are sent to the PN531.
The integrated contactless UART and the firmware handle the protocol requirements for the communication
schemes including the RF based protocols as well as the protocols for host communication.
The microcontroller with its embedded firmware allows autonomous management of communication both on
the RF interface and with the host.
Various host interfaces are implemented to fulfil different customer requirements.
Output driver
Demodulator
Circuitry
Bit Decoder
Analog
Integrated
RF-Level-
Detector
Detector
Mode-
Contactless
Data processing
Generation &
generation &
Bit Coding &
CRC/Parity
Decoding
UART
Framing
Figure 1: PN531 Block Diagram
Check
Check
incl.
TM
Objective Short Form Specification Rev. 2.0 February 2004
or NFC coding of an incoming signal in order to prepare
PN531
6
80C51 Core,
µC based Transmission module
ROM,
RAM
serial UART
Interfaces
Host
USB
SPI
I2C
Interface
Host