SI4030-B1-FMR Silicon Laboratories Inc, SI4030-B1-FMR Datasheet - Page 44

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SI4030-B1-FMR

Manufacturer Part Number
SI4030-B1-FMR
Description
IC TX 900-960MHZ -8-13DB 20VQFN
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of SI4030-B1-FMR

Frequency
900MHz ~ 960MHz
Applications
General Purpose
Modulation Or Protocol
FSK, GFSK, OOK
Data Rate - Maximum
256 kbps
Power - Output
13dBm
Current - Transmitting
30mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Voltage - Supply
1.8 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
20-VQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Memory Size
-
Si4030/31/32-B1
7.5. Low Battery Detector
A low battery detector (LBD) with digital read-out is integrated into the chip. A digital threshold may be programmed
into the lbdt[4:0] field in "Register 1Ah. Low Battery Detector Threshold." When the digitized battery voltage
reaches this threshold an interrupt will be generated on the nIRQ pin to the microcontroller. The microcontroller can
confirm source of the interrupt by reading "Register 03h. Interrupt/Status 1" and “Register 04h. Interrupt/Status 2,”
on page 56.
If the LBD is enabled while the chip is in SLEEP mode, it will automatically enable the RC oscillator which will
periodically turn on the LBD circuit to measure the battery voltage. The battery voltage may also be read out
through "Register 1Bh. Battery Voltage Level" at any time when the LBD is enabled. The low battery detect function
is enabled by setting enlbd=1 in "Register 07h. Operating Mode and Function Control 1".
The LBD output is digitized by a 5-bit ADC. When the LBD function is enabled, enlbd = 1 in "Register 07h.
Operating Mode and Function Control 1", the battery voltage may be read at anytime by reading "Register 1Bh.
Battery Voltage Level." A battery voltage threshold may be programmed in “Register 1Ah. Low Battery Detector
Threshold." When the battery voltage level drops below the battery voltage threshold an interrupt will be generated
on the nIRQ pin to the microcontroller if the LBD interrupt is enabled in “Register 06h. Interrupt Enable 2,” on page
59. The microcontroller will then need to verify the interrupt by reading the interrupt status register, addresses 03
and 04h. The LSB step size for the LBD ADC is 50 mV, with the ADC range demonstrated in the table below. If the
LBD is enabled the LBD and ADC will automatically be enabled every 1 s for approximately 250 µs to measure the
voltage which minimizes the current consumption in Sensor mode. Before an interrupt is activated four consecutive
readings are required.
44
Ad R/W
1A
1B
R/W
R
Low Battery Detector Threshold
Function/Description
Battery Voltage Level
BatteryVol
ADC Value
29
30
31
0
1
2
D7
0
tage
D6
0
1
Rev 1.1
7 .
VDD Voltage [V]
50
D5
0
mV
1.7–1.75
1.75–1.8
3.1–3.15
3.15–3.2
< 1.7
> 3.2
vbat[4] vbat[3] vbat[2] vbat[1] vbat[0]
lbdt[4]
D4
ADCValue
lbdt[3]
D3
lbdt[2]
D2
lbdt[1]
D1
lbdt[0]
D0
POR Def.
14h

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