ATA8743-PXQW Atmel, ATA8743-PXQW Datasheet - Page 55
ATA8743-PXQW
Manufacturer Part Number
ATA8743-PXQW
Description
MCU W/TRANSMITTER ASK/FSK 24QFN
Manufacturer
Atmel
Datasheet
1.ATA8743-PXQW.pdf
(238 pages)
Specifications of ATA8743-PXQW
Frequency
868MHz ~ 928MHz
Applications
Home Automation, Remote Sensing, RKE
Modulation Or Protocol
ASK, FSK
Data Rate - Maximum
32 kBit/s
Power - Output
3.5dBm ~ 8dBm
Current - Transmitting
9.3mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Memory Size
4kB Flash, 256B EEPROM, 256B SRAM
Voltage - Supply
1.8 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
24-VQFN Exposed Pad, 24-HVQFN, 24-SQFN, 24-DHVQFN
Processor Series
ATA8x
Core
AVR8
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
4 KB
Data Ram Size
256 B
Interface Type
SPI, USI
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ATASTK512-EK1-IND
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Details
- Current page: 55 of 238
- Download datasheet (4Mb)
16. System Control and Reset
16.0.1
16.0.2
9152B–INDCO–02/10
Resetting the AVR
Reset Sources
During reset, all I/O Registers are set to their initial values, and the program starts execution
from the Reset Vector. The instruction placed at the Reset Vector must be a RJMP – Relative
Jump – instruction to the reset handling routine. If the program never enables an interrupt
source, the Interrupt Vectors are not used, and regular program code can be placed at these
locations. The circuit diagram in
page 57
The I/O ports of the AVR are immediately reset to their initial state when a reset source goes
active. This does not require any clock source to be running.
After all reset sources have gone inactive, a delay counter is invoked, stretching the internal
reset. This allows the power to reach a stable level before normal operation starts. The time-out
period of the delay counter is defined by the user through the SUT and CKSEL Fuses. The dif-
ferent selections for the delay period are presented in
The ATtiny24/44/84 has four sources of reset:
• Power-on Reset. The MCU is reset when the supply voltage is below the Power-on Reset
• External Reset. The MCU is reset when a low level is present on the RESET pin for longer than
• Watchdog Reset. The MCU is reset when the Watchdog Timer period expires and the
• Brown-out Reset. The MCU is reset when the supply voltage V
threshold (V
the minimum pulse length when RESET function is enabled.
Watchdog is enabled.
threshold (V
defines the electrical parameters of the reset circuitry.
POT
BOT
).
) and the Brown-out Detector is enabled.
Figure 16-1 on page 56
“Clock Sources” on page
shows the reset logic.
CC
is below the Brown-out Reset
ATA8743
42.
Table 16-1 on
55
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