ATA8743-PXQW Atmel, ATA8743-PXQW Datasheet - Page 108
ATA8743-PXQW
Manufacturer Part Number
ATA8743-PXQW
Description
MCU W/TRANSMITTER ASK/FSK 24QFN
Manufacturer
Atmel
Datasheet
1.ATA8743-PXQW.pdf
(238 pages)
Specifications of ATA8743-PXQW
Frequency
868MHz ~ 928MHz
Applications
Home Automation, Remote Sensing, RKE
Modulation Or Protocol
ASK, FSK
Data Rate - Maximum
32 kBit/s
Power - Output
3.5dBm ~ 8dBm
Current - Transmitting
9.3mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Memory Size
4kB Flash, 256B EEPROM, 256B SRAM
Voltage - Supply
1.8 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
24-VQFN Exposed Pad, 24-HVQFN, 24-SQFN, 24-DHVQFN
Processor Series
ATA8x
Core
AVR8
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
4 KB
Data Ram Size
256 B
Interface Type
SPI, USI
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ATASTK512-EK1-IND
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Details
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21.2.1
108
ATA8743
Registers
Figure 21-1. 16-bit Timer/Counter Block Diagram
The Timer/Counter (TCNT1), Output Compare Registers (OCR1A/B), and Input Capture Regis-
ter (ICR1) are all 16-bit registers. Special procedures must be followed when accessing the
16-bit registers. These procedures are described in the section
page
CPU access restrictions. Interrupt requests (abbreviated to Int.Req. in the figure) signals are all
visible in the Timer Interrupt Flag Register (TIFR). All interrupts are individually masked with the
Timer Interrupt Mask Register (TIMSK). TIFR and TIMSK are not shown in the figure.
The Timer/Counter can be clocked internally, via the prescaler, or by an external clock source on
the T1 pin. The Clock Select logic block controls which clock source and edge the Timer/Counter
uses to increment (or decrement) its value. The Timer/Counter is inactive when no clock source
is selected. The output from the Clock Select logic is referred to as the timer clock (clk
The double buffered Output Compare Registers (OCR1A/B) are compared with the Timer/Coun-
ter value at all time. The result of the compare can be used by the Waveform Generator to
generate a PWM or variable frequency output on the Output Compare pin (OC1A/B). See
put Compare Units” on page
Flag (OCF1A/B) which can be used to generate an Output Compare interrupt request.
110. The Timer/Counter Control Registers (TCCR1A/B) are 8-bit registers and have no
Timer/Counter
TCCRnA
OCRnB
OCRnA
TCNTn
ICRn
=
=
116. The compare match event will also set the Compare Match
Direction
Count
Clear
Control Logic
TOP
=
TCCRnB
Values
BOTTOM
Fixed
TOP
ICFn (Int.Req.)
clk
Detector
Edge
=
Tn
0
“Accessing 16-bit Registers” on
OCnA
(Int.Req.)
OCnB
(Int.Req.)
TOVn
(Int.Req.)
Clock Select
Generation
Generation
( From Prescaler )
Waveform
Waveform
Canceler
Detector
Noise
Edge
Comparator Ouput )
( From Analog
9152B–INDCO–02/10
OCnA
OCnB
T
ICPn
1
Tn
).
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