ATA5749-6DPY Atmel, ATA5749-6DPY Datasheet - Page 15

• Manufacturer Part Number: ATA5749-6DPY
• Description: IC XMITTER FRACT-N PLL 10TSSOP
• Manufacturer: Atmel

Specifications of ATA5749-6DPY

• Frequency: 300MHz ~ 450MHz
• Applications: General Data Transfer
• Modulation Or Protocol: ASK, FSK
• Data Rate - Maximum: 40 kbps
• Power - Output: 12.5dBm
• Current - Transmitting: 8.8mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Voltage - Supply: 1.9 V ~ 3.6 V
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 10-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Memory Size: -

Figure 6-4.
9128G–RKE–03/11
SDIN_TXDIN
CLK (Output)
SCK (Input)
PA (Output
Timing Diagram when using Reset_Register_Mode
EN (Input)
Power)
(Input)
Table 6-3.
Operating Mode
OFF_Mode
Start_Up_Mode_1
Start_Up_Mode_2
TX_Mode1
TX_Mode2
Clock_Only_Mode
Reset_Register_Mode
Configuration_Mode_1
Configuration_Mode_2
Note:
Start_Up_
Mode_1
Configuration
1. Only if activated with CLK_ON = HIGH
Start_Up_
32-bit
Mode_2
Active Circuits as a Function of Operating Mode
TX_Mode1
T
PLL
TX_Mode1 and
Data
TX_
TX_Mode2
TX_Mode2
T
SDIN_TXDIN_setup
FSK;
ASK:
Active Circuit Blocks
-none-
Power up/down; XTO; digital control
Power up/down; XTO; digital control; fractional-N-PLL
Power up/down; XTO; digital control; fractional-N-PLL; CLK_DRV
Power up/down; XTO; digital control; fractional-N-PLL; CLK_DRV
Power up/down; XTO; digital control; CLK_DRV
Power up/down; XTO; digital control; CLK_DRV
Power up/down; XTO; digital control; CLK_DRV
Power up/down; XTO; digital control; CLK_DRV
T
Register_
EN_Reset
Reset_
Mode
T
EN_setup
figuration_
Mode_1
Con-
Configuration
figuration_
32-bit
Mode_2
Con-
TX_Mode1
T
PLL
TX_Mode1 and
Data
TX_
TX_Mode2
TX_Mode2
Atmel ATA5749
ASK:
FSK;
(1)
(1)
(1)
(1)
; fractional-N-PLL
OFF_
Mode
(1)
(1)
; PA
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