ATMEGA128RZAV-8MU Atmel, ATMEGA128RZAV-8MU Datasheet - Page 41

• Manufacturer Part Number: ATMEGA128RZAV-8MU
• Description: MCU ATMEGA1281/AT86RF230 64-QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RZAV-8MU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3dBm
• Sensitivity: -101dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 8kB RAM
• Antenna Connector: PCB, Surface Mount
• Package / Case: 64-QFN
• For Use With: ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Operating Temperature: -
• Current - Transmitting: -
• Current - Receiving: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

5131E-MCU Wireless-02/09
Bit
0x2D
Read/Write
Reset value
Bit
0x2C
Read/Write
Reset value
Bit
0x2C
Read/Write
Reset value
• Bit [7:4] – MAX_FRAME_RETRIES
MAX_FRAME_RETRIES specifies the maximum number of frame retransmission in
TX_ARET transaction.
• Bit [3:1] – MAX_CSMA_RETRIES
MAX_CSMA_RETRIES specifies the maximum number of retries in TX_ARET
transaction to repeat the random back-off/CCA procedure before the transaction gets
cancelled. Even though the valid range of MAX_CSMA_RETRIES is [0, 1 … 5]
according to IEEE 802.15.4-2003, the AT86RF230 can be configured up to a maximum
value of 7 retries.
• Bit 0 – Reserved
Register 0x2D (CSMA_SEED_0)
The CSMA_SEED_0 register contains a fraction of the CSMA_SEED value for the
CSMA-CA algorithm.
• Bit [7:0] – CSMA_SEED_0
The register bits CSMA_SEED_0 contain the lower 8 bits of the CSMA_SEED. The
upper 3 bits are stored in register bits CSMA_SEED_1 of register 0x2E
(CSMA_SEED_1). CSMA_SEED is the seed of the random number generator for the
CSMA-CA algorithm.
Register 0x2E (CSMA_SEED_1)
The CSMA_SEED_1 register contains a fraction of the CSMA_SEED value, the back-
off exponent for the CSMA-CA algorithm and configuration bits for address filtering in
RX_AACK operation.
• Bit [7:6] – MIN_BE
The register bit MIN_BE defines the minimal back-off exponent used in the CSMA-CA
algorithm to generate a pseudo random number for back-off the CCA. For details refer
to IEEE 802.15.4-2003 section 7.5.1.3. If set to zero, the start of the CCA algorithm is
not delayed.
• Bit 5 – AACK_SET_PD
This register bit defines the content of the frame pending subfield for acknowledgement
frames in RX_AACK mode. If this bit is enabled the frame pending subfield of the
I_AM_COORD
R/W
7
1
R/W
R/W
7
1
3
0
R/W
6
1
MIN_BE
R/W
5
1
R/W
R/W
6
1
2
0
CSMA_SEED_0
R/W
4
0
CSMA_SEED_1
AACK_SET_PD
R/W
3
1
R/W
R/W
5
0
1
1
R/W
2
0
R/W
1
1
Reserved
R/W
AT86RF230
R
4
0
0
0
R/W
0
0
CSMA_SEED_0
CSMA_SEED_1
CSMA_SEED_1
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