EM351-MOD-LR-ANT-TG Ember, EM351-MOD-LR-ANT-TG Datasheet - Page 132
EM351-MOD-LR-ANT-TG
Manufacturer Part Number
EM351-MOD-LR-ANT-TG
Description
MODULE EM351 PA/LNA W/ANT TG
Manufacturer
Ember
Specifications of EM351-MOD-LR-ANT-TG
Frequency
2.4GHz
Data Rate - Maximum
250kbps
Modulation Or Protocol
802.15.4 Zigbee
Voltage - Supply
2.1 V ~ 3.6 V
Current - Receiving
26mA
Current - Transmitting
31mA
Data Interface
PCB, Surface Mount
Memory Size
128kB Flash, 12kB RAM
Antenna Connector
On-Board, Chip
Operating Temperature
-40°C ~ 85°C
Package / Case
Module
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power - Output
-
Applications
-
Sensitivity
-
Other names
636-1016
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In addition, if the TIM_URS bit in the TIMx_CR1 register is set, setting the TIM_UG bit generates a UEV, but
without setting the INT_TIMUIF flag. Thus no interrupt request is sent. This avoids generating both update and
capture interrupt when clearing the counter on the capture event.
When a UEV occurs, the update flag (the INT_TIMUIF bit in the INT_TIMxFLAG register) is set (unless TIM_USR
is 1) and the following registers are updated:
Figure 9-9, Figure 9-10, and Figure 9-11 show some examples of the counter behavior for different clock
frequencies.
The prescaler shadow register is reloaded with the buffer value (contents of the TIMx_PSC register).
The auto-reload active register is updated with the buffer value (contents of the TIMx_ARR register). If the
update source is a counter overflow, the auto-reload is updated before the counter is reloaded, so that the
next period is the expected one. The counter is loaded with the new value.
Figure 9-10. Counter Timing Diagram, Update Event with TIM_ARBE = 1 (counter underflow)
Figure 9-9. Counter Timing Diagram, Internal Clock Divided by 1, TIMx_ARR = 0x6
Final
9-8
120-035X-000G
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