ATA5429-PLQW Atmel, ATA5429-PLQW Datasheet - Page 65
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ATA5429-PLQW
Manufacturer Part Number
ATA5429-PLQW
Description
IC TXRX ASK/FSK 915MHZ 48-QFN
Manufacturer
Atmel
Specifications of ATA5429-PLQW
Frequency
915MHz
Data Rate - Maximum
20kbps
Modulation Or Protocol
ASK, FSK
Applications
Alarm, ISM, Telemetry
Power - Output
5dBm
Sensitivity
-112.5dBm
Voltage - Supply
2.4 V ~ 3.6 V or 4.4 V ~ 6.6 V
Current - Receiving
10.5mA
Current - Transmitting
10mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Product Depth (mm)
7mm
Product Height (mm)
0.9mm
Product Length (mm)
7mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Lead Free Status / Rohs Status
Compliant
Other names
ATA5429-PLQW
ATA5429-PLQWTR
ATA5429-PLQWTR
Table 9-5.
9.3
4841D–WIRE–10/07
Mode
TX
Interrupts
TX Modulation Schemes
ASK/_NFSK
0
1
Via pin IRQ, the transceiver signals different operating conditions to a connected microcontrol-
ler. If a specific operating condition occurs, pin IRQ is set to high.
If an interrupt occurs, it is recommended to delete the interrupt immediately by reading the sta-
tus register, so that a further potential interrupt doesn’t get lost. If the Interrupt pin doesn’t switch
to low by reading the status register, the interrupt was triggered by the RX/TX data buffer. In this
case read or write the RX/TX data buffer according to
Table 9-6.
Operating Conditions Which Set Pin IRQ to High
Level
Events in Status Register
State transition of status bit STn
(0
Appearance of status bit Power_On
(0
Appearance of status bit P_On_Aux
(0
Events During TX Operation (T_MODE = 0)
4, 8 or 12 Bytes are in the TX data buffer or the TX
data buffer is empty (depends on IR0 and IR1 in
control register 1).
Events During RX Operation (T_MODE = 0)
4, 8 or 12 received bytes are in the RX data buffer or a
receiving error is occurred (depends on IR0 and IR1
in control register 1).
Successful bit check (P_MODE = 0)
Note:
1; 1
1)
1)
P_Mode
1. During reading of the RX/TX buffer, no IRQ is issued, due to the received bytes or a receiving
0)
0
0
1
1
X
X
0
0
1
1
X
X
error.
Interrupt Handling
ATA5423/ATA5425/ATA5428/ATA5429
T_Mode
0
0
0
0
1
1
0
0
0
0
1
1
Bit in TX/RX
Data Buffer
X
X
X
X
1
0
1
0
1
0
1
0
Operations Which Set Pin IRQ to Low Level
Read status register or
Command Delete IRQ
Write TX data buffer or
Write control register 1 or
Write control register 4 or
Write control register 5 or
Write control register 6 or
Command delete IRQ
Read RX data buffer
Write control register 1 or
Write control register 4 or
Write control register 5 or
Write control register 6 or
Command delete IRQ
Table
Level on Pin
SDI_TMDI
9-6.
X
X
X
X
X
X
X
X
1
0
1
0
(1)
or
f
f
ASK
ASK
f
f
FSK_L
FSK_H
off
on
f
f
f
f
RF
f
f
ASK
ASK
ASK
ASK
f
f
FSK_H
FSK_H
FSK_L
FSK_L
OUT
on
off
on
off
f
f
f
f
FSK_H
ASK
ASK
FSK_L
on
off
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