MC13224VR2 Freescale Semiconductor, MC13224VR2 Datasheet - Page 24

IC PLATFORM PIP802.15.4 145LGA

MC13224VR2

Manufacturer Part Number
MC13224VR2
Description
IC PLATFORM PIP802.15.4 145LGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC13224VR2

Frequency
2.4GHz
Data Rate - Maximum
250kbps
Modulation Or Protocol
802.15.4 Zigbee
Applications
General Purpose
Power - Output
4dBm
Sensitivity
-100dBm
Voltage - Supply
2 V ~ 3.6 V
Current - Receiving
24mA
Current - Transmitting
29mA
Data Interface
PCB, Surface Mount
Memory Size
128kB Flash, 96kB RAM
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 105°C
Package / Case
145-LGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
MC13224VR2
MC13224VR2TR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC13224VR2
Manufacturer:
EPCOS
Quantity:
34 000
5.6
The MC1322x has two SPI modules that use a common architecture
5.6.1
The MC1322x offers a dedicated Serial Peripheral Interface (SPI) module for external use. The SPI is a
high-speed synchronous serial data input/output port used for interfacing with serial memories, peripheral
devices, or other processors. The SPI allows a serial bit stream of a programmed length (1 to 32 bits) to be
shifted simultaneously into and out of the device at a programmed bit-transfer rate (called 4-wire mode).
There are four pins associated with the SPI port (SPI_SCK, SPI_MOSI, SPI_MISO, and SPI_SS).
The SPI module can be programmed for master or slave operation. It also supports a 3-wire mode where
for master mode the MOSI becomes MOMI, a bidirectional data pin, and for slave mode the MISO
becomes SISO, a bidirectional data pin. In 3-wire mode, data is only transferred in one direction at a time.
The SPI bit clock is derived from the peripheral reference clock (typically 24 MHz with a maximum of 26
MHz). A prescaler divides the peripheral reference clock with a programmed divide ratio from 2 to 256.
Typical bit clock range will be from 12 MHz to 93.75 kHz.
The SPI has the following features:
5.6.2
The SPIF is an internal SPI block dedicated to control, reading, and writing of the serial FLASH memory
(NVM). It uses the same architecture as the general SPI block, but is limited by the characteristics of the
FLASH SPI interface.
24
Master or slave mode operation
Data buffer is 4 bytes (32 bits) in length
SPI transfer length programmable from 1 to 32 bits
MSB-first shifting
Programmable transmit bit rate (typically 12 MHz max)
Serial clock phase and polarity options
Full-duplex (4-wire) or bidirectional data (3-wire) operation
SPI transaction can be polled or interrupt driven
Slave select signal
Low Power (SPI Master uses gated clocks. SPI Slave clock derived completely from SPI_SCK.)
Serial Peripheral Interface (SPI) Modules
External SPI Module
SPI FLASH Module (SPIF)
MC1322x Technical Data, Rev. 1.3
Freescale Semiconductor

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