CYWUSB6935-48LFXC Cypress Semiconductor Corp, CYWUSB6935-48LFXC Datasheet - Page 20

• Manufacturer Part Number: CYWUSB6935-48LFXC
• Description: IC USB WIRELESS 2.4GHZ 48VQFN
• Manufacturer: Cypress Semiconductor Corp

Specifications of CYWUSB6935-48LFXC

• Frequency: 2.4GHz
• Data Rate - Maximum: 62.5kbps
• Modulation Or Protocol: DSSS, GFSK
• Applications: AMR, ISM, RKE
• Power - Output: 0dBm
• Sensitivity: -95dBm
• Voltage - Supply: 2.7 V ~ 3.6 V
• Current - Receiving: 57.7mA
• Current - Transmitting: 69.1mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
• Transmitting Current: 69.1mA
• Data Rate: 62.5Kbps
• Frequency Range: 2.4GHz To 2.483GHz
• Modulation Type: GFSK
• Rf Ic Case Style: QFN
• No. Of Pins: 48
• Supply Voltage Range: 2.7V To 3.6V
• Operating: RoHS Compliant
• Sensitivity Dbm: -95dBm
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 428-1625

Document 38-16008 Rev. *A
Bit
7
6
5:0 Crystal Adjust
Bit
7:6 VCO Slope Enable
5:0 Reserved
Reserved
Name
Reserved
Clock Output Disable The Clock Output Disable bit disables the 13 MHz clock driven on the X13OUT pin.
Name
(Write-Only)
7
7
VCO Slope Enable
Addr: 0x24
Addr: 0x26
Clock Output
Disable
6
6
Description
The Voltage Controlled Oscillator (VCO) Slope Enable bits are used to specify the amount of variance automat-
ically added to the VCO.
These bits are undefined for read operations.
These bits are reserved and should be written with zeroes.
Description
This bit is reserved and should be written with zero.
If the 13 MHz clock is driven on the X13OUT pin then receive sensitivity will be reduced by -4 dBm on channels
5+13n. By default the 13 MHz clock output pin is enabled. This pin is useful for adjusting the 13 MHz clock, but
it interfere with every 13th channel beginning with 2.405GHz channel. Therefore, it is recommended that the 13
MHz clock output pin be disabled when not in use.
The Crystal Adjust value is used to calibrate the on-chip parallel load capacitance supplied to the crystal. Each
increment of the Crystal Adjust value typically adds 0.135 pF of parallel load capacitance. The total range is 8.5
pF, starting at 8.65 pF. These numbers do not include PCB parasitics, which can add an additional 1-2 pF.
11 = -5/+5 VCO adjust. The application MCU must configure this option during initialization
10 = -2/+3 VCO adjust
01 = Reserved
00 = No VCO adjust
1 = No 13 MHz clock driven externa
0 = 13 MHz clock driven externally
5
5
Figure 7-28. VCO Calibration
Figure 7-27. Crystal Adjust
REG_CRYSTAL_ADJ
4
REG_VCO_CAL
4
ll
y
3
3
Crystal Adjust
Reserved
2
2
1
1
CYWUSB6935
Default: 0x00
Default: 0x00
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