TEA5767HN/V3,118 NXP Semiconductors, TEA5767HN/V3,118 Datasheet - Page 11

• Manufacturer Part Number: TEA5767HN/V3,118
• Description: IC STEREO RADIO FM 40-HVQFN
• Manufacturer: NXP Semiconductors

Specifications of TEA5767HN/V3,118

• Package / Case: 40-VFQFN Exposed Pad
• Frequency: 76MHz ~ 108MHz
• Modulation Or Protocol: FM
• Current - Receiving: 3.9mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Voltage - Supply: 2.5 V ~ 5 V
• Operating Temperature: -10°C ~ 60°C
• Operating Supply Voltage: 3 V
• Maximum Operating Temperature: + 75 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 10 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Applications: -
• Sensitivity: -
• Memory Size: -
• Data Rate - Maximum: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: TEA5767HN/V3-TNXP; TEA5767HN/V3-TNXP

NXP Semiconductors
8. I
TEA5767HN_5
Product data sheet
2
C-bus, 3-wire bus and bus-controlled functions
8.1.1 Data transfer
8.1 I
Information about the I
it” (order number 9398 393 40011) .
The standard I
Remark: The I
allowed to connect the IC to an I
Data sequence: address, byte 1, byte 2, byte 3, byte 4 and byte 5 (the data transfer has to
be in this order). The Least Significant Bit (LSB) = 0 of the address indicates a WRITE
operation to the TEA5767HN.
Bit 7 of each byte is considered as the Most Significant Bit (MSB) and has to be
transferred as the first bit of the byte.
The data becomes valid bitwise at the appropriate falling edge of the clock. A STOP
condition after any byte can shorten transmission times.
When writing to the transceiver by using the STOP condition before completion of the
whole transfer:
The IC can be switched into a low current Standby mode with the standby bit; the bus is
then still active. The standby current can be reduced by deactivating the bus interface
(pin BUSENABLE LOW). If the bus interface is deactivated (pin BUSENABLE LOW)
without the Standby mode being programmed, the IC maintains normal operation, but is
isolated from the bus lines.
The software programmable output (SWPORT1) can be programmed to operate as a
tuning indicator output. As long as the IC has not completed a tuning action,
pin SWPORT1 remains LOW. The pin becomes HIGH, when a preset or search tuning is
completed or when a band limit is reached.
The reference frequency divider of the synthesizer PLL is changed when the MSB in
byte 5 is set to logic 1. The tuning system can then be clocked via pin XTAL2 at 6.5 MHz.
2
•
•
C-bus specification
IC address: 110 0000b
Structure of the I
Subaddresses are not used
The maximum LOW-level input and the minimum HIGH-level input are specified to
0.2V
The pin BUSMODE must be connected to ground to operate the IC with the I
The remaining bytes will contain the old information
If the transfer of a byte is not completed, the new bits will be used, but a new tuning
cycle will not be started
CCD
and 0.45V
2
C-bus specification is expanded by the following definitions:
2
C-bus operates at a maximum clock frequency of 400 kHz. It is not
2
C-bus logic: slave transceiver
CCD
Rev. 05 — 26 January 2007
2
C-bus can be found in the brochure “The I
respectively.
Low-power FM stereo radio for handheld applications
2
C-bus operating at a higher clock rate.
TEA5767HN
2
C-bus and how to use
© NXP B.V. 2007. All rights reserved.
2
C-bus.
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