ATA5724P3-TKQY Atmel, ATA5724P3-TKQY Datasheet - Page 11
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ATA5724P3-TKQY
Manufacturer Part Number
ATA5724P3-TKQY
Description
IC RCVR ASK/FSK UHF 20-SSOP
Manufacturer
Atmel
Datasheet
1.ATA5723-DK.pdf
(46 pages)
Specifications of ATA5724P3-TKQY
Frequency
433MHz
Sensitivity
-113dBm
Data Rate - Maximum
10 kbps
Modulation Or Protocol
ASK, FSK
Applications
General Purpose
Current - Receiving
11mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Package / Case
20-SOIC (0.200", 5.30mm Width)
Operating Temperature (min)
-40C
Operating Temperature (max)
105C
Operating Temperature Classification
Industrial
Product Depth (mm)
4.4mm
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Memory Size
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATA5724P3-TKQY
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
8. Polling Mode
8.1
9106E–RKE–07/08
Sleep Mode
The clock cycle of some function blocks depends on the selected baud-rate range (BR_Range),
which is defined in the OPMODE register. This clock cycle T
formulas:
BR_Range =
According to
three different modes. In sleep mode the signal processing circuitry is disabled for the time
period T
nal processing circuits are enabled and settled. In the following bit-check mode, the incoming
data stream is analyzed bit-by-bit and compared with a valid transmitter signal. If no valid signal
is present, the receiver is set back to sleep mode after the period T
according to each check as it is a statistical process. An average value for T
electrical characteristics. During T
condition of the receiver is indicated on pin IC_ACTIVE. The average current consumption in
polling mode is dependent on the duty cycle of the active mode and can be calculated as:
During T
reception of a transmitted command, the transmitter must start the telegram with an adequate
preburst. The required length of the preburst depends on the polling parameters T
T
depends on the actual bit rate and the number of bits (N
The following formula indicates how to calculate the preburst length.
T
The length of period T
sion factor X
calculated to be:
T
The maximum value of T
2 ms in that case. The sleep time can be extended to almost half a second by setting X
X
Setting the configuration word Sleep to its maximal value puts the receiver into a permanent
sleep mode. The receiver remains in this state until another value for Sleep is programmed into
the OPMODE register. This is particularily useful when several devices share a single data line.
(It can also be used for microcontroller polling: using pin POLLING/_ON, the receiver can be
switched on and off.)
I
Spoll
Preburst
Sleep
Bit-check
Sleep
= Sleep
=
can be set to 8 by bit X
Sleep
I
--------------------------------------------------------------------------------------------------------------- -
Sleep
and the start-up time of a connected microcontroller, T
Soff
T
Sleep
while consuming low current of I
Figure 8-1 on page
Sleep
and T
T
+ T
T
Sleep
X
Sleep
Sleep
(according to
Startup
Startup
+
Sleep
+
I
Son
T
, the receiver is not sensitive to a transmitter signal. To guarantee the
+ T
1024
Sleep
Startup
is defined by the 5-bit word Sleep of the OPMODE register, the exten-
Bit-check
SleepStd
BR_Range0:
BR_Range1:
BR_Range2:
BR_Range3:
is about 60 ms if X
T
+
Startup
Table 11-8 on page
T
12, the receiver stays in polling mode in a continuous cycle of
T
Clk
Startup
+ T
Bit-check
to “1”.
Start_microcontroller
+
and T
T
ATA5723/ATA5724/ATA5728
Bit-check
S
Bit-check
= I
Soff
Sleep
. During the start-up period, T
, the current consumption is I
27), and the basic clock cycle T
T
T
T
T
is set to 1. The time resolution is about
Bit-check
XClk
XClk
XClk
XClk
= 8
= 4
= 2
= 1
) to be tested.
XClk
Start_microcontroller
T
T
T
T
Clk
Clk
Clk
Clk
is defined by the following
Bit-check
Bitcheck
. This period varies
. Thus, T
is given in the
Startup
Sleep
S
= I
Sleep
, T
Son
, all sig-
Clk
Bit-check
Startup
. It is
. The
to 8.
11
,