TDA5221 Infineon Technologies, TDA5221 Datasheet - Page 26

• Manufacturer Part Number: TDA5221
• Description: RECEIVER SHR FSK/ASK SGL TSSOP28
• Manufacturer: Infineon Technologies
• Type: Receiverr

Specifications of TDA5221

• Package / Case: 28-TSSOP
• Frequency: 300MHz ~ 340MHz
• Sensitivity: -113dBm
• Data Rate - Maximum: 100 kbps
• Modulation Or Protocol: ASK, FSK
• Applications: RKE, Remote Control Systems
• Current - Receiving: 6.2mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 105°C
• Operating Frequency: 340 MHz
• Operating Supply Voltage: 5 V
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Temperature (min): -40C
• Operating Temperature (max): 105C
• Operating Temperature Classification: Industrial
• Product Depth (mm): 4.4mm
• Product Length (mm): 9.7mm
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Memory Size: -
• Lead Free Status / Rohs Status: Compliant
• Other names: SP000014343; TDA5221; TDA5221INTR; TDA5221XT

Figure 9
3.7
The FSK datapath has a bandpass characterisitc due to the feedback shown above
(highpass) and the data filter (lowpass). The lower cutoff frequency f2 is determined by
the external RC-combination. The upper cutoff frequency f3 is determined by the data
filter bandwidth.
The demodulation gain of the FSK PLL demodulator is 200µV/kHz. This gain is
increased by the gain v of the FSK switch, which is 11. Therefore the resulting dynamic
gain of this circuit is 2.2mV/kHz within the bandpass. The gain for the DC content of FSK
signal remains at 200µV/kHz. The cut-off frequencies of the bandpass have to be chosen
such that the spectrum of the data signal is influenced in an acceptable amount.
In case that the user data is containing long sequences of logical zeroes the effect of the
drift-off of the bit slicer threshold voltage can be lowered if the offset voltage inherent at
the negative input of the slicer comparator (Pin20) is used. The comparator has no
hysteresis built in.
This offset voltage is generated by the bias current of the negative input of the
comparator (i.e. 20nA) running over the external resistor R. This voltage raises the
voltage appearing at pin 20 (e.g. 1mV with R = 100k ). In order to obtain benefit of this
Preliminary Specification
from RSSI Gen
(ASK signal)
1.5 V......2.5 V
FSK PLL Demodulator
0.18 m V/kHz
typ. 2 V
FSK Mode
ASK/FSK mode datapath
ASK m ode: v=1
FSK m ode: v=11
ASK/FSK Switch
R
+
+
30k
-
-
F4 int
ASK
FSK
300k
R
F3 int
R
100k
F1 int
22
FFB
C12
R
100k
F2 int
26
21
Data Filter
OOP
v = 1
C14
H=ASK
L=FSK
19
SLP
M SEL
R1
C13
15
20
DETECTOR
SLN
PEAK
+
+
-
-
CP
CM
Comp
16
R
T1 int
R
H=CP
L=CM
SSEL
T2
V 1.1, 2004-10-20
56k
390k
26
25
Applications
TDA 5221
PDO
DATA Out
C15
100nF