RF2483TR7 RFMD, RF2483TR7 Datasheet - Page 8

• Manufacturer Part Number: RF2483TR7
• Description: IC QUADRATURE MOD DUAL-BND 20QFN
• Manufacturer: RFMD

Specifications of RF2483TR7

• Function: Modulator
• Lo Frequency: 700MHz ~ 2.2GHz
• Rf Frequency: 700MHz ~ 2.2GHz
• P1db: 6dBm
• Noise Floor: -156.7dBm/Hz
• Output Power: 3dBm
• Current - Supply: 110mA
• Voltage - Supply: 2.7 V ~ 3.3 V
• Test Frequency: 1.9GHz
• Package / Case: 20-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 689-1015-2

RF2483
8 of 28
Pin
1
2
3
4
5
6
Function
ENABLE
ISIG N
ISIG P
VCC3
VCC2
VCC1
Description
Supply for RF output circuits.
Supply for modulator and biasing circuits.
In phase I channel positive baseband input port. Best performance is
achieved when the ISIGP and ISIGN are driven differentially. The recom-
mended CW differential drive level (V
This input should be DC-biased at 1.2V±0.05V. The common-mode DC
coltage on the ISIGP and ISIGN input signals is used to bias the modulator.
In sleep mode an internal FET switch is opened, the input goes high imped-
ance and the modulator is de-biased. The input impedance is typically
5.5kΩ at low frequencies and at higher frequencies can be modeled as
50Ω in series with 12pF to ground.
Phase or amplitude errors between the ISIGP and ISIGN signals may result
in the even order distortion of the modulation in the output spectrum.
DC offsets between the ISIGP and ISIGN signals will result in increased car-
rier leakage. Small DC offsets may be deliberately applied between the
ISIGP/ISIGN and QSIGP/QSIGN inputs to cancel out LO leakage. The opti-
mum corrective DC offsets will change with mode, frequency and gain con-
trol.
Common-mode noise on the ISIGP and ISGN should be kept low as it may
degrade the noise performance of the modulator.
Phase offsets may be applied between the I and Q channels to improve the
sideband suppression performance.
In phase I channel negative baseband input port. See ISIGP.
Enables power to the device.
CMOS input.
Logic 1 (1.4V to VCC)=Enabled.
Logic 0 (0V to 0.5V)=Powered Down.
Supply for the LO buffers and quadrature network.
The sideband suppression is a function of the VCC1 voltage. The inclusion
of R3 (39Ω) lowers the voltage on VCC1 by around 400mV and results an
improvement in sideband suppression but around a 0.2dB increase in
noise at 20MHz offset.
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at ([phone] or [e-mail].
ISIGP
-V
ISIGN
) is 800mV
P-P
.
Interface Schematic
VCC3
VCC2
GND1
VCC1
Modulator and
V
LO Quadrature
V
Generator and
RF Output
C C 2
C C 2
Amplifier
VGA
Buffers
5 0 Ω
V
5 0 Ω
C C 2
Rev A9 DS080403
1 2 p F
1 2 p F
VCC2