AD8346ARUZ Analog Devices Inc, AD8346ARUZ Datasheet - Page 11

• Manufacturer Part Number: AD8346ARUZ
• Description: IC QUADRATURE MOD .8GHZ 16-TSSOP
• Manufacturer: Analog Devices Inc

Specifications of AD8346ARUZ

• Function: Modulator
• Lo Frequency: 800MHz ~ 2.5GHz
• Rf Frequency: 800MHz ~ 2.5GHz
• P1db: -3dBm
• Noise Floor: -147dBm/Hz
• Output Power: -6dBm
• Current - Supply: 55mA
• Voltage - Supply: 2.7 V ~ 5.5 V
• Test Frequency: 1.9GHz
• Package / Case: 16-TSSOP
• Frequency Range: 0.8GHz To 2.5GHz
• Rf Type: Quadrature
• Supply Voltage Range: 2.7V To 5.5V
• Rf Ic Case Style: TSSOP
• No. Of Pins: 16
• Operating Temperature Range: -40°C To +85°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

BASIC CONNECTIONS
The basic connections for operating the AD8346 are shown in
Figure 27. A single power supply of between 2.7 V and 5.5 V is
applied to pins VPS1 and VPS2. A pair of ESD protection
diodes are connected internally between VPS1 and VPS2 so
these must be tied to the same potential. Both pins should be
individually decoupled using 100 pF and 0.01 μF capacitors,
located as close as possible to the device. For normal operation,
the enable pin, ENBL, must be pulled high. The turn-on
threshold for ENBL is 2 V. To put the device in its power-down
mode, ENBL must be pulled below 0.5 V. Pins COM1 to COM4
should all be tied to a low impedance ground plane.
The I and Q ports should be driven differentially. This is con-
venient as most modern high speed DACs have differential
outputs. For optimal performance, the drive signal should be a
2 V p-p (differential) signal with a bias level of 1.2 V, that is,
each input swings from 0.7 V to 1.7 V. The I and Q inputs have
input impedances of 12 kΩ. By dc coupling the DAC to the
AD8346 and applying small offset voltages, the LO feedthrough
can be reduced to well below its nominal value of −42 dBm
(see Figure 12).
LO DRIVE
The return loss of the LO port is shown in Figure 18. No add-
itional matching circuitry is required to drive this port from a
50 Ω source. For maximum LO suppression at the output, a
differential LO drive is recommended. In Figure 27, this is
achieved using a balun (M/A-COM Part Number ETC1-1-13).
The output of the balun is ac-coupled to the LO inputs which
LO
+V
IN
IP
S
5
4
0.01μF
ETC1-1-13
C4
T1
1
2
3
C3
100pF
100pF
100pF
C6
C7
1
2
3
4
5
6
7
8
Figure 27. Basic Connections
IBBP
IBBN
COM1
COM1
LOIN
LOIP
VPS1
ENBL
Rev. A | Page 11 of 20
AD8346
QBBP
QBBN
COM4
COM4
COM3
COM2
VOUT
VPS2
have a bias level about 800 mV below supply. An LO drive
level of between −6 dBm and −12 dBm is required. For optimal
performance, a drive level of −10 dBm is recommended,
although a level of −6 dBm results in more stable temperature
performance (see Figure 8). Higher levels degrade linearity
while lower levels tend to increase the noise floor.
The LO terminal can be driven single-ended, as shown in
Figure 26 at the expense of slightly higher LO feedthrough.
LOIN is ac coupled to ground using a capacitor and LOIP is
driven through a coupling capacitor from a (single-ended)
50 Ω source (this scheme could also be reversed with LOIP
being ac-coupled to ground).
RF OUTPUT
The RF output is designed to drive a 50 Ω load, but must be ac-
coupled, as shown in Figure 27. If the I and Q inputs are driven
in quadrature by 2 V p-p signals, the resulting output power is
about −10 dBm (see Figure 7 for variations in output power
over frequency).
16
15
14
13
12
11
10
9
100pF
C1
LO
100pF
Figure 26. Single-Ended LO Drive
100pF
C5
100pF
C2
0.01μF
LOIP
LOIN
AD8346
+V
QP
QN
VOUT
S
AD8346