AD608ARZ Analog Devices Inc, AD608ARZ Datasheet - Page 10

• Manufacturer Part Number: AD608ARZ
• Description: IC MIXER/LIMITER IF 3V 16-SOIC
• Manufacturer: Analog Devices Inc
• Series: AD608r

Specifications of AD608ARZ

• Rf Type: FM, GSM, PM, PHS, FM
• Frequency: 500MHz
• Number Of Mixers: 1
• Gain: 24dB
• Noise Figure: 16dB
• Secondary Attributes: Down Converter
• Current - Supply: 7.3mA
• Voltage - Supply: 2.7 V ~ 5.5 V
• Package / Case: 16-SOIC (0.154", 3.90mm Width)
• Supply Voltage Range: 3V To 5.5V
• Rf Ic Case Style: SOIC
• No. Of Pins: 16
• Operating Temperature Range: -25°C To +85°C
• Msl: MSL 1 - Unlimited
• Ic Function: Mixer/Limiter/RSSI Receiver IF Subsystem
• Termination Type: SMD
• Supply Voltage Min: 2.7V
• Rohs Compliant: Yes
• Operating Supply Voltage: 3V
• Operating Temperature (max): 85C
• Filter Terminals: SMD
• Digital Ic Case Style: SOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

AD608
IF FILTER TERMINATIONS
The AD608 was designed to drive a parallel-terminated 10.7 MHz
band-pass filter (BPF) with a 330 Ω impedance. With a 330 Ω
parallel-terminated filter, Pin MXOP sees a 165 Ω termination,
and the gain is nominally 24 dB. Other filter impedances and
gains can be accommodated by either accepting an increase or
decrease in gain in proportion to the filter impedance or by
keeping the impedance seen by MXOP at a nominal 165 Ω (by
using resistive dividers or matching networks). Figure 23 shows a
simple resistive voltage divider for matching an assortment of
filter impedances, and Table 6 lists component values.
THE LOGARITHMIC IF AMPLIFIER
The logarithmic IF amplifier consists of five amplifier stages
of 16 dB gain each, plus a final limiter. The IF bandwidth is
30 MHz (−1 dB), and the limiting gain is 110 dB. The phase
skew is ±3° from −75 dBm to +5 dBm (approximately 111 μV p-p
to 1.1 V p-p). The limiter output impedance is 200 Ω, and the
Table 6. AD608 Filter Termination and Offset-Null Feedback Loop Resistor and Capacitor Values for Common IFs
IF
450 kHz
455 kHz
6.5 MHz
10.7 MHz
1
2
Resistor values were calculated so that R1 + R2 = Z
Operation at IFs of 450 kHz and 455 kHz requires use of an external low-pass filter with at least one pole at a cutoff frequency of 90 kHz (a decade below the ripple at 900 kHz).
2
RFLO
RFHI
5V
Filter Impedance
1500 Ω
1500 Ω
1000 Ω
330 Ω
1µF
C1
5
6
VPS1 COM1
1
PREAMP
2
24dB MIXER GAIN
LO
LO INPUT
–16dBm
MIXER
3
LOHI
C2
100pF
MIDSUPPLY
COM2
IF BIAS
Figure 23. Applications Diagram for Common IFs and Filter Impedances
CMOS LOGIC
4
DRIVER
FILTER
BPF
INPUT
VMID
BIAS
MXOP
16
47kΩ
and R1||(R2 + Z
PRUP
R1
174 Ω
174 Ω
178 Ω
330 Ω
7
8
Values
R2
R1
(ASSUMES 6dB IN FILTER)
Filter Termination Resistor
BAND-PASS
100nF
INSERTION LOSS
12dB NOMINAL
FILTER
FILTER
1
Rev. C | Page 10 of 16
for 24 dB of Mixer Gain
) = 165 Ω.
+
R2
1330 Ω
1330 Ω
825 Ω
0 Ω
R3
C1
R4
C5
limiter output drive is ± 200 mV (400 mV p-p) into a 5 kΩ load.
In the absence of an input signal, the limiter output limits noise
fluctuations, producing an output that continues to swing
400 mV p-p, but with random zero crossings.
OFFSET FEEDBACK LOOP
Because the logarithmic amplifier is dc-coupled and has more
than 110 dB of gain from the input to the limiter output, a dc
offset at its input of even a few microvolts causes the output to
saturate. Therefore, the AD608 uses a low frequency feedback
loop to null the input offset. Referring to Figure 23, the loop
consists of a current source driven by the limiter, which sends
50 μA current pulses to Pin FDBK. The pulses are low-pass filtered
by a π-network consisting of C1, R4, and C5. The smoothed dc
voltage that results is subtracted from the input to the IF amplifier
at Pin IFLO. Because this is a high gain amplifier with a feedback
loop, care should be taken in layout and component values to
prevent oscillation. Recommended values for the common IFs
of 450 kHz, 455 kHz, 6.5 MHz, and 10.7 MHz are listed in Table 6.
10
13
9
IFHI
IFLO
FDBK
R3
1500 Ω
1500 Ω
1000 Ω
330 Ω
5-STAGE IF AMPLIFIER
(16dB PER STAGE)
RECTIFIER CELLS
7 FULL-WAVE
110dB LIMITER GAIN
90dB RSSI
R4
1000 Ω
1000 Ω
100 Ω
100 Ω
AD608
2MHz
LPF
Feedback Loop Values
LIMITER
FINAL
C1
200 nF
200 nF
18 nF
18 nF
Offset-Null
±50µA
11
12
14
15
RSSI
COM3
VPS2
LMOP
C5
100 nF
100 nF
10 nF
10 nF