TDA9898HN/V2,518 NXP Semiconductors, TDA9898HN/V2,518 Datasheet - Page 35
![IC IF PROCESSOR MULTISTD 48HVQFN](/photos/6/92/69297/48-hvqfn_sot778-3_pkg_sml.jpg)
TDA9898HN/V2,518
Manufacturer Part Number
TDA9898HN/V2,518
Description
IC IF PROCESSOR MULTISTD 48HVQFN
Manufacturer
NXP Semiconductors
Datasheet
1.TDA9898HNV3518.pdf
(103 pages)
Specifications of TDA9898HN/V2,518
Function
IF Processor
Rf Type
ATV, DVB, FM
Package / Case
48-VFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935283079518
TDA9898HN/V2-T
TDA9898HN/V2-T
TDA9898HN/V2-T
TDA9898HN/V2-T
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NXP Semiconductors
TDA9897_TDA9898_4
Product data sheet
Table 39.
Table 40.
[1]
[2]
Bit
7
6
5
4
3
2
1
0
EXTFILO
Not recommended in combination with internal IF level set to reduced (W4[7] = 1).
At internal Nyquist processing off (W7[0] = 1) it is mandatory to set the internal video level to normal
(W7[4] = 0).
7
W7 - data write register bit allocation
W7 - data write register bit description
Symbol
EXTFILO
VAGC
SIFLEVEL SIF level reduction
VIDLEVEL video level reduction
PORT1
MODEP1
FILOUTBP external filter output signal source; see
NYQOFF
VAGC
6
Description
mute of output buffer of pin EXTFILO
gain control voltage of VIF amplifier at pin MPP; see
output state; port 1 mode selection set to logic output port (W7[2] = 1)
port 1 mode selection; pin PORT1
internal Nyquist processing; see
SIFLEVEL VIDLEVEL
Rev. 04 — 25 May 2009
1 = mute
0 = normal
1 = internal SIF level is reduced by 6 dB (only for AM sound)
0 = internal SIF level is normal
1 = internal video level is reduced by 6 dB
0 = internal video level is normal
1 = output port is HIGH (external pull-up resistor needed)
0 = output port is LOW
1 = logic output port; level controlled by bit PORT1 (W7[3])
0 = monitor output of VIF AGC voltage
1 = signal for external filter is obtained behind internal BP filter
0 = signal for external filter is obtained behind SIF mixer
1 = internal Nyquist processing off
0 = internal Nyquist processing on
5
4
PORT1
TDA9897; TDA9898
3
Multistandard hybrid IF processing
Table 24
[2]
MODEP1
Figure 9
2
[1]
FILOUTBP NYQOFF
Table 31
© NXP B.V. 2009. All rights reserved.
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