ATA556714N-DDB Atmel, ATA556714N-DDB Datasheet - Page 8

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ATA556714N-DDB

Manufacturer Part Number
ATA556714N-DDB
Description
IC IDIC R/W 330BIT 75PF
Manufacturer
Atmel
Datasheet

Specifications of ATA556714N-DDB

Function
Read/Write
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
4.5
Figure 4-2.
Figure 4-3.
8
e5550 Sequence Terminator
Sequence
Waveforms per different modulation types
Manchester
FSK
Sequence terminator not suitable for Bi-phase or PSK modulation
ATA5567
Regular read mode
Read Data Stream with Sequence Terminator
e5550-compatible Sequence Terminator Waveforms
No terminator
St = on
The sequence terminator ST is a special damping pattern which is inserted before the first block
and may be used to synchronize the reader. This e5550-compatible sequence terminator con-
sists of 4 bit periods with underlaying data values of “1”. During the second and the fourth bit
periods, modulation is switched off (Manchester encoding – switched on). Bi-phase modulated
data blocks need fixed leading and trailing bits in combination with the sequence terminator to
be identified reliably.
The sequence terminator may be individually enabled by setting mode bit 29 (ST = 1) in the
e5550-compatibility mode (X-mode = 0).
In the regular-read mode, the sequence terminator is inserted at the start of each
MAXBLK-limited read data stream.
In block-read mode – after any block-write or direct access command – or if MAXBLK was set to
0 or 1, the sequence terminator is inserted before the transmission of the selected block.
This behavior is especially different from former e5550-compatible ICs (T5551, T5554).
Sequence terminator
Bit period
Last bit
Block 1
V
CoilPP
Block 1
Block 2
Data 1
Block 2
Modulation
MAXBLK
off (on)
Data 1
MAXBLK
Sequence terminator
Block 1
Data 1
Block 1
Modulation
Block 2
off (on)
Data 1
Block 2
bit 1 or 0
First bit
4874F–RFID–07/08

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