TDA1593T/V3,118 NXP Semiconductors, TDA1593T/V3,118 Datasheet - Page 5

• Manufacturer Part Number: TDA1593T/V3,118
• Description: IC IF FM RADIO AMP/DEMOD 20SOIC
• Manufacturer: NXP Semiconductors

Specifications of TDA1593T/V3,118

• Function: Demodulator, Amplifier
• Current - Supply: 20mA
• Voltage - Supply: 7.5 V ~ 12 V
• Package / Case: 20-SOIC (0.300", 7.50mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Gain: -
• Noise Figure: -
• P1db: -
• Lo Frequency: -
• Rf Frequency: -
• Other names: 935177210118; TDA1593TD-T; TDA1593TD-T

Philips Semiconductors
FUNCTIONAL DESCRIPTION
The limiter amplifier has five stages of IF amplification
using balanced differential limiter amplifiers with emitter
follower coupling.
Decoupling of the stages from the supply voltage line and
an internal high-ohmic DC feedback loop give a very stable
IF performance. The amplifier gain is virtually independent
of changes in temperature.
The FM demodulator is fully balanced and compromises
two cross-coupled differential amplifiers.
The quadrature detection of the FM signal is performed by
direct feeding of one differential amplifier from the limiter
amplifier output, and the other via an external 90 degrees
phase shifting network. The demodulator has a good
stability and a small zero-cross-over shift. The bandwidth
of the demodulator output is restricted by an internal
low-pass filter to approximately 1 MHz. Non-linearities,
which are introduced by demodulation, are compensated
by the THD compensation circuit. For this reason, the
demodulator resonance circuit (between pins 10 and 11)
1996 Oct 10
IF amplifier/demodulator for
FM car radio receivers
Fig.2 Pin configuration for DIP-version.
DEMI1
V oAF
WLV
DDV
ULV
LVA
V ref
n.c.
V P
1
2
3
4
5
6
7
8
9
TDA1593
MBE513
18
17
16
15
14
13
12
11
10
V iIF
LFB2
LFB1
GND
MUTE
ST0
ST1
TSW
DEMI2
5
must have a loaded Q-factor of 19. Consequently, there is
no need for the demodulator tuned circuit to be adjusted
for minimum distortion. Adjustment criterion is a
symmetrical stop pulse. The control voltage for the mute
attenuator (pin 16) is derived from the values of the level
detector and the detuning detector output signals.
The mute attenuator has a fast attack and a slow decay
determined by the capacitor on pin 16. The AF signal is fed
via the mute attenuator to the output (pin 4). A weighted
control voltage (pin 6) is obtained from the mute attenuator
control voltage via a buffer amplifier that introduces an
additional voltage shift and gain.
The level detector generates a voltage output signal
proportional to the amplitude of the input signal.
The unweighted level detector output signal is available.
The open-collector tuning stop output voltages STOP-0
and STOP-1 (pins 15 and 14) are derived from the
detuning and the input signal level. The pins 14 and 15
may be tied together, if only one tuning-stop output is
required.
Fig.3 Pin configuration for SO-version.
DEMI1
V oAF
WLV
DDV
ULV
LVA
V ref
n.c.
n.c.
V P
10
1
2
3
4
5
6
7
8
9
TDA1593T
MBE514
20
19
18
17
16
15
14
13
12
11
Product specification
V iIF
LFB2
LFB1
GND
MUTE
ST0
ST1
TSW
n.c.
DEMI2
TDA1593