DK-DEV-4CGX150N Altera, DK-DEV-4CGX150N Datasheet - Page 33

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DK-DEV-4CGX150N

Manufacturer Part Number
DK-DEV-4CGX150N
Description
KIT STARTER CYCLONE IV GX
Manufacturer
Altera
Series
CYCLONE® IV GXr
Type
FPGAr

Specifications of DK-DEV-4CGX150N

Contents
Board, Cable, Documentation, Power Supply
For Use With/related Products
Cyclone IV GX
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-2713

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Chapter 6: Board Test System
Using the Board Test System
© March 2010 Altera Corporation
The following sections describe the controls on the PCIe tab.
Start
The Start control initiates the loopback tests.
Stop
The Stop control terminates the loopback tests.
Data Pattern
The Data pattern control specifies the type of data contained in the transactions. The
following data types are available for analysis:
Data Rate
The Data rate control specifies the speed of the transactions. The following data rates
are available for analysis:
Control Register Settings
The Control register settings controls specify loopback test parameters. The
following settings are available for analysis:
Status
These controls display current transaction performance analysis information collected
since you last clicked Start:
PRBS 7—Selects pseudo-random 7-bit sequences.
PRBS 15—Selects pseudo-random 15-bit sequences.
PRBS 23—Selects pseudo-random 23-bit sequences.
PRBS 31—Selects pseudo-random 31-bit sequences.
PCIe compliance—Selects the repeating 40-bit PCIe compliance pattern:
/K28.5/D21.5/K28.5/D10.2/with the first /K28.5/ code group encoded with
negative current disparity (0011111010) to conform to the PCIe protocol. The
pattern is intended to be a signal loopback to demonstrate signal quality rather
than a complete PCIe compliance test.
1.25 Gbps—Selects a 1.25 Gbps transaction data rate.
2.5 Gbps—Selects a 2.5 Gbps transaction data rate.
Serial loopback—Routes signals back to the sender.
VOD—Specifies the voltage output differential of the transmitter buffer.
Pre-emphasis—Specifies the amount of pre-emphasis on the transmitter buffer.
RX equalizer—Enables the static equalizer.
DC gain—Specifies the boost to incoming signals.
PLL lock—Shows the PLL locked or unlocked state.
Pattern sync—Shows the pattern synced or not synced state. The pattern is
considered synced when the start of the data sequence is detected.
Cyclone IV GX Transceiver Starter Kit User Guide
6–15

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