73M1866B-KEYCHN Maxim Integrated Products, 73M1866B-KEYCHN Datasheet - Page 53
73M1866B-KEYCHN
Manufacturer Part Number
73M1866B-KEYCHN
Description
BOARD KEYCHAIN INF DANUBE EVM
Manufacturer
Maxim Integrated Products
Datasheets
1.73M1866B-KEYCHN.pdf
(88 pages)
2.73M1866B-KEYCHN.pdf
(14 pages)
3.73M1866B-KEYCHN.pdf
(15 pages)
4.73M1866B-KEYCHN.pdf
(13 pages)
Specifications of 73M1866B-KEYCHN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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DS_1x66B_001
Rev. 1.6
Function
Mnemonic
PCODE
RCS
RPOL
RTS
Register
Location
0x23[5:2]
0x22[5:3]
0x21[7]
0x21[6:0]
Type
W
W
W
W
PCM Clock Code
The default state of PCODE out of reset is 0000. In PCM Slave
Mode at reset, the device will attempt to automatically detect the
correct frequency of PCLK. If the PCLK frequency is different from
those listed in the table below or an incorrect PCODE value is
written, the PLL will not lock (LOCKDET 0x0D[7] == 0). To modify
the value of PCODE, first write a value of 0000 and then write the
required PCODE value. Toggling of the MASTER bit 0x23[6]
(0
PCLK frequency detection function.
Receive Clock Slot
These bits control the starting clock of the receive channel. The
clock slot value allows the adding of an offset of up to 7 (111) bits to
the time slot value. A value of 000 is zero offset.
Receive Polarity
0 = The receive PCM data is to be sampled on the falling edge of
PCLK. (Default)
1 = The receive PCM data is to be sampled on the rising edge of
PCLK.
Receive Time Slot
Selects the time slot number on the PCM highway for the receiver.
The maximum number of 8-bit time slots is 128 (with a PCLK
frequency of 8.192 MHz). A value of 0000000 is time slot zero and
1111111 is time slot 128. The default is 0000000.
256 kHz
512 kHz
768 kHz
1.024 MHz
1.536 MHz
1.544 MHz
2.048 MHz
3.088 MHz
4.096 MHz
6.176 MHz
8.192 MHz
Frequency
1
PCLK
0) with a PCODE of 0000 will also restart the automatic
PCODE [3:0]
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
Description
73M1866B/73M1966B Data Sheet
53
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