XR16L784IV-F Exar Corporation, XR16L784IV-F Datasheet - Page 51

• Manufacturer Part Number: XR16L784IV-F
• Description: IC UART 8B 3.3V QUAD 64LQFP
• Manufacturer: Exar Corporation
• Type: IrDA or RS- 485r

Specifications of XR16L784IV-F

• Number Of Channels: 4, QUART
• Package / Case: 64-LQFP
• Features: *
• Fifo's: 64 Byte
• Protocol: RS485
• Voltage - Supply: 2.97 V ~ 5.5 V
• With Auto Flow Control: Yes
• With Irda Encoder/decoder: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• Mounting Type: Surface Mount
• Data Rate: 6.25 Mbps
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.97 V
• Supply Current: 5 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V or 5 V
• No. Of Channels: 4
• Uart Features: Tx/Rx FIFO Counters
• Supply Voltage Range: 2.97V To 5.5V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: LQFP
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 1016-1282

REV. 1.2.3
4.0 INTERNAL REGISTER DESCRIPTIONS ............................................................................................. 27
ABSOLUTE MAXIMUM RATINGS ................................................................................ 41
ELECTRICAL CHARACTERIISTICS ............................................................................. 41
PACKAGE DIMENSIONS, 64-LQFP ............................................................................. 48
TABLE OF CONTENTS .................................................................................................... I
3.2 UART CHANNEL CONFIGURATION REGISTERS .......................................................................................... 25
4.1 RECEIVE HOLDING REGISTER (RHR) - READ ONLY ................................................................................... 27
4.2 TRANSMIT HOLDING REGISTER (THR) - WRITE ONLY ................................................................................ 27
4.3 INTERRUPT ENABLE REGISTER (IER) - READ/WRITE ................................................................................. 27
4.4 INTERRUPT STATUS REGISTER (ISR) - READ ONLY ................................................................................... 28
4.5 FIFO CONTROL REGISTER (FCR) - WRITE ONLY ......................................................................................... 30
4.6 LINE CONTROL REGISTER (LCR) - READ/WRITE ......................................................................................... 31
4.7 MODEM CONTROL REGISTER (MCR) - READ/WRITE .................................................................................. 33
4.8 LINE STATUS REGISTER (LSR) - READ ONLY .............................................................................................. 34
4.9 MODEM STATUS REGISTER (MSR) - READ ONLY ....................................................................................... 34
4.10 MODEM STATUS REGISTER (MSR) - WRITE ONLY .................................................................................... 35
4.11 SCRATCH PAD REGISTER (SPR) - READ/WRITE ....................................................................................... 36
4.12 FEATURE CONTROL REGISTER (FCTR) - READ/WRITE ............................................................................ 36
4.13 ENHANCED FEATURE REGISTER (EFR) - READ/WRITE ........................................................................... 38
4.14 TXCNT[7:0]: TRANSMIT FIFO LEVEL COUNTER - READ ONLY ................................................................ 39
4.15 TXTRG [7:0]: TRANSMIT FIFO TRIGGER LEVEL - WRITE ONLY ............................................................... 39
4.16 RXCNT[7:0]: RECEIVE FIFO LEVEL COUNTER - READ ONLY ................................................................... 39
4.17 RXTRG[7:0]: RECEIVE FIFO TRIGGER LEVEL - WRITE ONLY ................................................................... 39
T
T
T
T
T
T
T
T
T
T
DC ELECTRICAL CHARACTERISTICS ............................................................................................... 41
AC ELECTRICAL CHARACTERISTICS ............................................................................................... 43
R
Figure 16. XR16L784 VOL Sink Current Chart ............................................................................................................................ 42
Figure 17. XR16L784 VOH Source Current Chart ....................................................................................................................... 42
Figure 19. 68 Mode (Motorola) Data Bus Read and Write Timing ............................................................................................... 45
Figure 20. Modem Input/Output Port Delay ................................................................................................................................. 46
Figure 21. Receive Interrupt Timing [Non-FIFO Mode] ................................................................................................................ 46
Figure 22. Transmit Interrupt Timing [Non-FIFO Mode] ............................................................................................................... 47
Figure 23. Receive Interrupt Timing [FIFO Mode] ....................................................................................................................... 47
Figure 24. Transmit Interrupt Timing [FIFO Mode] ...................................................................................................................... 47
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
Figure 18. 16 Mode (Intel) Data Bus Read and Write Timing ...................................................................................................... 44
EVISION
3.1.3 8XMODE [7:0] (default 0x00) ..................................................................................................................................... 23
3.1.4 REGA [7:0] reserved (default 0x00) .......................................................................................................................... 23
3.1.5 RESET [7:0] (default 0x00) ......................................................................................................................................... 23
3.1.6 SLEEP [7:0] - (default 0x00) ....................................................................................................................................... 24
3.1.7 Device Identification and Revision ............................................................................................................................ 24
3.1.8 REGB [7:0] - (default 0x00) ......................................................................................................................................... 24
4.3.1 IER VERSUS RECEIVE FIFO INTERRUPT MODE OPERATION .............................................................................. 27
4.3.2 IER VERSUS RECEIVE/TRANSMIT FIFO POLLED MODE OPERATION ................................................................. 27
4.4.1 INTERRUPT GENERATION: ....................................................................................................................................... 29
4.4.2 INTERRUPT CLEARING: ............................................................................................................................................ 29
10: TIMER CONTROL R
11: UART CHANNEL CONFIGURATION REGISTERS ...................................................................................................... 25
12: UART CHANNEL CONFIGURATION REGISTERS DESCRIPTION. S
13: I
14: T
15: P
16: A
17: 16 S
18: S
19: UART RESET CONDITIONS ........................................................................................................................................ 40
NTERRUPT
RANSMIT AND
ARITY SELECTION
UTO
OFTWARE
H
ISTORY
ELECTABLE
RS485 H
S
F
LOW
OURCE AND
.................................................................................................................................. 49
R
ALF
H
ECEIVE
C
YSTERESIS
-
.......................................................................................................................................................... 32
ONTROL
DUPLEX
EGISTER
FIFO T
P
RIORITY
D
F
L
UNCTIONS
IRECTION
EVELS
........................................................................................................................................ 22
RIGGER
L
EVEL
W
C
HEN
T
.......................................................................................................................... 38
ONTROL
ABLE AND
....................................................................................................................... 29
T
RIGGER
D
ELAY FROM
L
EVEL
T
II
ABLE
HIGH PERFORMANCE 2.97V TO 5.5V QUAD UART
S
ELECTION
-D
T
IS
RANSMIT
S
ELECTED
............................................................................. 31
HADED BITS ARE ENABLED BY
-
TO
-R
................................................................... 37
ECEIVE
................................................... 36
EFR B
XR16L784
IT
-4. .......... 26