73S1209F-68IMR/F Maxim Integrated Products, 73S1209F-68IMR/F Datasheet - Page 81
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73S1209F-68IMR/F
Manufacturer Part Number
73S1209F-68IMR/F
Description
IC SMART CARD READER 68-QFN
Manufacturer
Maxim Integrated Products
Datasheet
1.73S1209F-44IMF.pdf
(93 pages)
Specifications of 73S1209F-68IMR/F
Core Processor
80515
Core Size
8-Bit
Speed
24MHz
Connectivity
I²C, SmartCard, UART/USART
Peripherals
LED, POR, WDT
Number Of I /o
9
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
UG_12xxF_016
Since the Smart Card Clock for the external slots (slot ICC_2
single source, all external slots will share the same SC clock configuration. For example, if an application
sets the first external slot to one rate, subsequent calls to this function with a different rate will be ignored.
Rev. 1.50
CPU has much more overhead to process, a faster Smart Card clock may out run the CPU
resulting in unexpected or undesirable delays.
Care must be taken to make sure the Smart Card Clock is slower than the CPU clock. Since the
punIccTSTimeOut: Input/output parameter
Specifies the maximum delay in clock cycles between the de-assertion of the RST
signal and the leading edge of the TS character of the ATR. [Default value is 40 000]
pucIccRxErrorCounterT0: Input/output parameter
Specifies the maximum number of errors allowed when the Interface Device is in
reception mode in T=0 protocol.
pucIccTxErrorCounterT0: Input/output parameter
Specifies the maximum number of errors when the Interface Device is in
transmission mode in T=0 protocol.
pucIccTxErrorCounterT1: Input/output parameter
Specifies the maximum number of errors when T=1. The most significant nibble
gives the maximum number of R(NA) block transmissions, while the least significant
nibble gives the maximum number of I or S-block retransmissions.
ucIccConfigurationByte: Input/output parameter
This byte contains the following configuration bits:
[b0] bIccIFSDRequestT1: Input/output. Specifies if the next I-Block will be
[b1] bIccDeactivatedOnTimeOutErrorT1: Input/output. Specifies if the Smart Card
[b2] bIccNADErrorCheckingT1: Input/output. Specifies whether the NAD errors
[b3] bIccABORTManagementT1: Input/output. Specifies whether the ABORT
[b4] bIccRESYNCHManagementT1: Input/output. Specifies whether an
[b5] bIccRetransmitLastBlockAfterRESYNCHT1: Input/output. Specifies whether
[b6] bIccWarningStatusBytesManagementT0: Input/output. Specifies if the IFD
[b7] bIccDeactivateOnIFSDNegotiationError: Input/output. Specifies if the Smart
Icc_Hz: Input parameter
Specifies the desired Smart Card clock frequency. Available values are defined in
the API_Struct_12.h file (LAPI). The default value for both the internal and external
slots is 3.69 MHz.
DebouncePUEnable: Input parameter
The higher order (most significant) nibble of this byte enables (SC_DEBOUNCEON)
or disables (SC_DEBOUNCEOFF) card debounce. The low order (least significant)
nibble of this byte enables (TRUE) or disables (FALSE) the Pull-Up.
preceded by an S(IFS request) (TRUE) or not (FALSE).
interface is to be de-activated (TRUE) on a TimeOut error. Otherwise, an error
recovery procedure is engaged.
are to be checked (TRUE) or not (FALSE).
Request is to be managed (TRUE) or if the contacts are to be de-activated on
S(ABORT Request) reception (FALSE).
S(RESYNCH Request) command is to be sent when too many errors occur
(TRUE) or if a de-activation sequence is to be initiated (FALSE).
the last block in T=1 protocol is to be retransmitted after a resynchronization
occurs or the whole command. [Useful for Microsoft IFDTESTs suite]
must inform the application level of whether the status bytes have been
received just after the command header transmission or after the command
data transmission (in T=0 protocol). [Useful for EMV Test suites]
Card interface is to be de-activated on an IFSD negotiation error.
ND
or higher) is driven by the 73S12xxF
73S12xxF Software User Guide
81