MC9328MXLCVP15R2 Freescale Semiconductor, MC9328MXLCVP15R2 Datasheet - Page 21

• Manufacturer Part Number: MC9328MXLCVP15R2
• Description: IC MCU I.MXL 150MHZ 225-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MXLr

Specifications of MC9328MXLCVP15R2

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: EBI/EMI, I²C, Memory Stick, MMC/SD, SPI, SSI, UART/USART, USB
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Number Of I /o: 97
• Program Memory Type: ROMless
• Voltage - Supply (vcc/vdd): 1.7 V ~ 3.3 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-MAPBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Ram Size: -
• Program Memory Size: -
• Data Converters: -

4.2
Parameters of the DPLL are given in
pre-divider and T
Freescale Semiconductor
DPLL input clock freq range
Pre-divider output clock
freq range
DPLL output clock freq range
Pre-divider factor (PD)
Total multiplication factor (MF)
MF integer part
MF numerator
MF denominator
Pre-multiplier lock-in time
Freq lock-in time after
full reset
Freq lock-in time after
partial reset
Phase lock-in time after
full reset
Phase lock-in time after
partial reset
Freq jitter (p-p)
Phase jitter (p-p)
Power supply voltage
Power dissipation
Ref No.
4a
4b
Parameter
DPLL Timing Specifications
Output hold time
Output setup time
dck
Parameter
Table 9. Trace Port Timing Diagram Parameter Table (Continued)
is the output double clock period.
Vcc = 1.8V
Vcc = 1.8V
Vcc = 1.8V
–
Includes both integer and fractional parts
–
Should be less than the denominator
–
–
FOL mode for non-integer MF
(does not include pre-multi lock-in time)
FOL mode for non-integer MF (does not
include pre-multi lock-in time)
FPL mode and integer MF (does not include
pre-multi lock-in time)
FPL mode and integer MF (does not include
pre-multi lock-in time)
–
Integer MF, FPL mode, Vcc=1.8V
–
FOL mode, integer MF,
f
dck
= 200 MHz, Vcc = 1.8V
MC9328MXL Technical Data, Rev. 8
Table
Table 10. DPLL Specifications
Minimum
Test Conditions
2.28
3.42
10. In this table, T
1.8 ± 0.1 V
Maximum
–
–
ref
Functional Description and Application Information
is a reference clock period after the
Minimum
Minimum
250
220
300
270
1.7
80
5
5
2
3
5
1
5
0
1
–
–
–
–
3.0 ± 0.3 V
(0.01%)
Typical
(56 μs)
(50 μs)
(70 μs)
(64 μs)
(10%)
0.005
280
250
350
320
1.0
–
–
–
–
–
–
–
–
–
–
–
Maximum
–
–
Maximum
312.5
1022
1023
0.01
100
220
300
270
400
370
1.5
2.5
30
16
15
15
4
Unit
ns
ns
2•T
μ
MHz
MHz
MHz
Unit
mW
T
T
T
T
ns
sec
V
–
–
–
–
–
ref
ref
ref
ref
dck
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