MC9S08RD32DWER Freescale Semiconductor, MC9S08RD32DWER Datasheet - Page 95

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MC9S08RD32DWER

Manufacturer Part Number
MC9S08RD32DWER
Description
IC MCU 8BIT 32K FLASH 28-SOIC
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08RD32DWER

Core Processor
HCS08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
28-SOIC (0.300", 7.50mm Width)
Processor Series
S08RD
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SCI1, SPI1
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
39
Number Of Timers
2
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08RG60E
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details
7.5
Instruction Set Summary Nomenclature
The nomenclature listed here is used in the instruction descriptions in
Operators
CPU registers
Memory and addressing
M:M + 0x0001= A 16-bit value in two consecutive memory locations. The higher-order (most
Condition code register (CCR) bits
CCR activity notation
Freescale Semiconductor
CCR
PCH
PCL
PC
SP
( )
M
H
H
N
C
&
A
X
V
Z
HCS08 Instruction Set Summary
+
×
÷
|
:
I
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
Contents of register or memory location shown inside parentheses
Is loaded with (read: “gets”)
Boolean AND
Boolean OR
Boolean exclusive-OR
Multiply
Divide
Concatenate
Add
Negate (two’s complement)
Accumulator
Condition code register
Index register, higher order (most significant) 8 bits
Index register, lower order (least significant) 8 bits
Program counter
Program counter, higher order (most significant) 8 bits
Program counter, lower order (least significant) 8 bits
Stack pointer
A memory location or absolute data, depending on addressing mode
significant) 8 bits are located at the address of M, and the lower-order (least
significant) 8 bits are located at the next higher sequential address.
Two’s complement overflow indicator, bit 7
Half carry, bit 4
Interrupt mask, bit 3
Negative indicator, bit 2
Zero indicator, bit 1
Carry/borrow, bit 0 (carry out of bit 7)
Bit not affected
MC9S08RC/RD/RE/RG Data Sheet, Rev. 1.11
Central Processor Unit (S08CPUV2)Central Processor Unit (S08CPUV2)
Table
7-2.
95

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