ATMEGA8515L-8JU Atmel, ATMEGA8515L-8JU Datasheet - Page 184

• Manufacturer Part Number: ATMEGA8515L-8JU
• Description: MCU AVR 8K ISP FLASH MEM 44-PLCC
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA8515L-8JU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: EBI/EMI, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-LCC (J-Lead)
• Processor Series: ATMEGA8x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SPI, USART
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 35
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Minimum Operating Temperature: - 40 C
• Cpu Family: ATmega
• Device Core: AVR
• Device Core Size: 8b
• Frequency (max): 8MHz
• Total Internal Ram Size: 512Byte
• # I/os (max): 35
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: PLCC
• For Use With: ATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Parallel Programming
Enter Programming Mode
Considerations for Efficient
Programming
Chip Erase
184
ATmega8515(L)
The following algorithm puts the device in Parallel Programming mode:
1. Apply 4.5 - 5.5 V between V
2. Set RESET to “0”, wait for at least 100 ns and toggle XTAL1 at least six times.
3. Set the Prog_enable pins listed in Table 86 on page 183 to “0000” and wait at
4. Apply 11.5 - 12.5V to RESET. Any activity on Prog_enable pins within 100 ns
Note, if External Crystal or External RC configuration is selected, it may not be possible
to apply qualified XTAL1 pulses. In such cases, the following algorithm should be
followed:
1. Set Prog_enable pins listed in Table 86 on page 183 to “0000”.
2. Apply 4.5 - 5.5V between V
3. Wait 100 µs.
4. Re-program the fuses to ensure that External Clock is selected as clock source
5. Exit Programming mode by power the device down or by bringing RESET pin to
6. Entering Programming mode with the original algorithm, as described above.
The loaded command and address are retained in the device during programming. For
efficient programming, the following should be considered.
•
•
•
The Chip Erase will erase the Flash and EEPROM
bits are not reset until the Program memory has been completely erased. The Fuse bits
are not changed. A Chip Erase must be performed before the Flash or EEPROM are
reprogrammed.
Note:
Load Command “Chip Erase”
1. Set XA1, XA0 to “10”. This enables command loading.
2. Set BS1 to “0”.
3. Set DATA to “1000 0000”. This is the command for Chip Erase.
4. Give XTAL1 a positive pulse. This loads the command.
5. Give WR a negative pulse. This starts the Chip Erase. RDY/BSY goes low.
6. Wait until RDY/BSY goes high before loading a new command.
least 100 ns.
after +12V has been applied to RESET, will cause the device to fail entering Pro-
gramming mode.
applied to RESET.
(CKSEL3:0 = 0b0000) If Lock bits are programmed, a Chip Erase command
must be executed before changing the fuses.
0b0.
The command needs only be loaded once when writing or reading multiple memory
locations.
Skip writing the data value $FF, that is the contents of the entire EEPROM (unless
the EESAVE Fuse is programmed) and Flash after a Chip Erase.
Address high byte needs only be loaded before programming or reading a new 256
word window in Flash or 256 byte EEPROM. This consideration also applies to
Signature bytes reading.
1. The EEPRPOM memory is preserved during Chip Erase if the EESAVE Fuse is
programmed.
CC
CC
and GND, and wait for at least 100 µs.
and GND simultaneously as 11.5 - 12.5V is
(1)
memories plus Lock bits. The Lock
2512K–AVR–01/10