PCLT-2AT4 STMicroelectronics, PCLT-2AT4 Datasheet
PCLT-2AT4
Specifications of PCLT-2AT4
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PCLT-2AT4 Summary of contents
Page 1
... AS-interface network ■ Reduced overall dissipation = 22 nF) IN ■ Enhanced functional reliability ■ Compact with high integration ■ Surface Mount Package for highly automated assembly ■ Insensitive to the on state sensor impedance PCLT-2A TSSOP14 Exposed pad differential mode voltage RMS Rev 1 1/18 www.st.com 18 ...
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... Supply voltage Supply voltage protection protection protection SM15T39 SM15T39 SM15T39 2/ REF REF C C REF REF REF COM COM COM COM COM COM Reverse polarity Reverse polarity PCLT-2A PCLT-2A 1N4007 1N4007 PCLT-2A PCLT-2A PCLT- REF REF REF REF REF REF COM COM COM P P ...
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... COM COM MOD MOD MOD N.C. N.C. N. LED LED LED REF REF REF LED LED LED N.C.: Not Connected N.C.: Not Connected 1.3 Static characteristic of a type-2 digital input using PCLT- 0.7V 0.7V Figure 4. Termination block diagram CURRENT LIMITER I CURRENT LIMITER 60 ...
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... Maximum operating 12V Analog voltage T Operating Ambient temperature range AMB ALL T Operating Junction temperature range J Note voltage at the PCLT-2A power supply pin Respect to the reverse polarity test of one input as shown on 4/18 = 2.2 kΩ kΩ kΩ 750 Ω 750 Ω 2.2 kΩ C MOD MOD C = 2.2 kΩ ...
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... PCLT-2A 1.6 Electromagnetic compatibility ratings Ω T =25 ° 750 J I Symbol Node Parameter name & conditions ESD protection, IEC 61000-4-2, per input, in air ESD protection, IEC 61000-4-2, per input, in contact IN V ESD V ESD protection, IEC 61000-4-2, per input, in air ESD protection, IEC 61000-4-2, per input, in contact, R ...
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... kΩ 1.5 V REF OUT V > 2.9 V MOD kΩ > 4.5 V REF kΩ V > 5.5 V REF 4 2.5 V (Note 3) IN LED kΩ IN REF V = 2.5 V LED PCLT-2A Min Typ Max 6.1 7.6 8.8 2.8 3.6 4 2.3 - open REF - 0.1 0.2 0.02 0.1 ...
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... PCLT-2A Symbol Pin Name Output operation selection circuit V MOD Opto-CMOS threshold TH MOD I OUT CMOS output current OUT Power supply circuit I V Supply current MOD CMOS supply current DD Note: 1 According to application diagram ( diode from COM to GND (V 2 Same as note 1 above, but R 3 When no LED diode is used, connect LED pin to the COM 1 ...
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... V 19 18.5 18 17.5 17 16.5 16 15 Figure 6. Typical current limiter variation versus junction temperature I LIM 1.01 1.00 0.99 0.98 0.97 0.96 0.95 0.94 -40 8/18 with °C LIM T j (°C) - rising edge PLH = 2.2 kΩ ( 27 100 120 140 PCLT-2A ...
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... PCLT-2A Figure 7. Typical current limiter variation versus reference resistance R I (mA) LIM Figure 8. Typical limiter activation voltage variation versus junction temperature V LOW 3.0 2.5 2.0 1.5 -25 Figure 9. Thermal resistance variation versus copper area (35 µm layer thickness; 50vias/cm R th(j-a) 150% 140% 130% 120% ...
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... The PCLT- current limited dual channel circuit compatible with the type 2 (7.5 mA) or type 3 (3 mA) characteristic of the IEC61131-2 standard. An external resistance R the limiting current value to be adjusted from 3 to 7.5 mA. ...
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... ON state When the module input voltage V higher than 11V corresponding to a PCLT input voltage V are in ON state. The input current is then shared between the internal circuitry, the LED (about 60 %), and the driver output (about case of opto-coupler mode. In CMOS mode, the CMOS level is defined by the the bus controller: it can be 3 ...
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... Input reverse polarity robustness 4 Input reverse polarity robustness Each input of the PCLT circuit may be biased to a reverse polarity equal corresponds to a connection mistake or a reverse biasing that is generated by the demagnetization of a monitored inductive solenoid. The involved input withstands the high reverse current mA; its opto-coupler is OFF and is protected by the conducting input diode ...
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... Programming of the PCLT-2A according to the input type requirement The operation of the PCLT-2 can be set to the various logic input types defined in the IEC61131-2 standard. The current reference of the input-limiting block of each channel is programmable thanks to an external resistor R different for each type, the external input resistor R voltage robustness of the whole circuit ...
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... In the same manner, the sensor logic signal is isolated from the AS- Interface power supply bus to avoid any degradation of the data transmission. A conventional way to achieve the interface with the PCLT and the AS- Interface controller is to insert an opto-coupler between the AS-Interface controller and the PCLT that runs in opto- coupler mode as shown on figure 1 (MOD=0) ...
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... The logic signal is transmitted with a low level of less than 20% of the V supply voltage and a high level of at least 3.5 V defined by the PCLT output DD buffer limiting its current to 35 µA minimum and the 100 kΩ pull down resistor (0.035 mA times 100 kΩ ...
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... E1 4.3 4.4 4.5 0.169 0.173 0.177 e 0.65 L 0.45 0.6 0.75 0.018 0.024 0.029 L1 1.0 k 0° 8° 0° aaa 0.1 D1 3.6 E2 3.0 0.40 0.65 1.20 PCLT-2A Inches Typ. Max. 0.047 0.006 0.012 0.008 0.025 0.039 8° 0.004 0.142 0.118 ...
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... Number of Integrated channels A = EMC level: 500v according to IEC61000-4-5 for type 2 1000v according to IEC61000-4-5 for type Package TSSOP14 9 Ordering information Ordering Code Marking PCLT-2AT4 PCLT-2AT4 PCLT-2AT4-TR PCLT-2AT4 1. Exposed pad version 10 Revision history Date Revision 16-Nov-2005 PCLT - 2 Package Weight (1) 0.057g TSSOP14 (1) 0.057g ...
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... Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America 18/18 All other names are the property of their respective owners © 2005 STMicroelectronics - All rights reserved STMicroelectronics group of companies www.st.com PCLT-2A ...