TLE4470G Infineon Technologies, TLE4470G Datasheet - Page 14

• Manufacturer Part Number: TLE4470G
• Description: IC REGULATOR LDO DUAL PDSO-20
• Manufacturer: Infineon Technologies

Specifications of TLE4470G

• Regulator Topology: Positive Fixed and Adjustable
• Voltage - Output: 5V, Adjustable
• Voltage - Input: Up to 45V
• Voltage - Dropout (typical): 0.3V @ 100mA, 0.3V @ 200mA
• Number Of Regulators: 2
• Current - Output: 100mA (Max), 250mA (Max)
• Current - Limit (min): 180mA, 350mA
• Operating Temperature: -40°C ~ 150°C
• Mounting Type: Surface Mount
• Package / Case: DSO-20
• Number Of Outputs: 2
• Polarity: Positive
• Input Voltage Max: 45 V
• Output Voltage: 5 V
• Output Type: Fixed
• Dropout Voltage (max): 0.5 V at 100 mA
• Output Current: 180 mA, 350 mA
• Line Regulation: 20 mV
• Load Regulation: 50 mV
• Voltage Regulation Accuracy: 2 %
• Maximum Operating Temperature: + 150 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: SP000011856; TLE4470G; TLE4470GNT; TLE4470GT; TLE4470GTR

Input, Output
The input capacitor
approx. 1
be damped. To stabilize the regulation circuits of the stand-by and main regulator, output
capacitors
C
For the TLE 4470 G (PG-DSO-20) the output voltage
adjusted to 5 V
adjust pin ADJ2. For
main output.
For calculating
V
or
R
Disable
The main regulator of the TLE 4470 can be switched OFF by a voltage above 2.3 V at
pin DIS. Reducing this voltage below 1.4 V will switch ON the main regulator again.
Reset Timing
The power-on reset delay time is defined by the charging time of an external capacitor
C
C
Definitions:
•
•
•
•
•
The reset reaction time
LOW after the output voltage has dropped below the reset threshold. It is typically 2 s
for delay capacitor of 100 nF. For other values for
using the following equation:
t
Data Sheet
rr
Q2
1
Q2
D
D
=
which can be calculated as follows:
= (
C
I
V
=
D,c
20 s/F
t
V
R
DU
D
V
= reset delay time
10 F, both with an ESR
2
= delay capacitor
=
= charge current, typical 5 A
t I
Q1
= upper delay switching threshold at
V
(
DU
V
C
D,c
Q2
in series with
(1 +
Q1
, typical 1.8 V
C
) / V
D
/
and
V
V
Q2
R
V
Q1
1
Q2,nom
or
C
C
/
- 1)
V
R
Q2
I
R
is necessary for compensating line influences. Using a resistor of
Q2
2
)
1
are necessary. Stability is guaranteed at values
t
rr
= 5 V the voltage adjust pin has to be connected directly to the
and
C
is the time it takes the voltage regulator to set the reset out
20 V by connecting an external voltage divider to the voltage
I
, the LC circuit of input inductivity and input capacitance can
R
2
respectively the following equations can be used:
10
within the operating temperature range.
14
C
D
for reset delay time
C
D
the reaction time can be estimated
V
Q2
of the main regulator can be
Rev. 1.2, 2008-03-20
C
Q1
TLE 4470
6 F and
(1)
(2)
(3)
(4)