TLE4270-2 Infineon Technologies, TLE4270-2 Datasheet - Page 9

• Manufacturer Part Number: TLE4270-2
• Description: IC REG LDO 5V TO220-5
• Manufacturer: Infineon Technologies

Specifications of TLE4270-2

• Regulator Topology: Positive Fixed
• Voltage - Output: 5V
• Voltage - Input: 6 ~ 42 V
• Voltage - Dropout (typical): 0.35V @ 550mA
• Number Of Regulators: 1
• Current - Output: 550mA (Max)
• Current - Limit (min): 650mA
• Operating Temperature: -40°C ~ 150°C
• Mounting Type: Through Hole
• Package / Case: TO-220-5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: SP000304935

Design Notes for External Components
An input capacitor
circuit consisting of lead inductance and input capacitance can be damped by a resistor
of approx. 1
the regulating circuit. Stability is guaranteed at values of
< 3 .
Reset Circuitry
If the output voltage decreases below 4.5 V, an external capacitor
discharged by the reset generator. If the voltage on this capacitor drops below
reset signal is generated on pin 2 (RO), i.e. reset output is set low. If the output voltage
rises above the reset threshold,
power-on-reset time the voltage on the capacitor reaches
be set high again. The value of the power-on-reset time can be set within a wide range
depending of the capacitance of
Reset Timing
The power-on reset delay time is defined by the charging time of an external capacitor
C
C
Definitions:
•
•
•
•
V
t
The reset reaction time
LOW after the output voltage has dropped below the reset threshold. It is typically 1 s
for delay capacitor of 47 nF. For other values for
using the following equation:
t
Data Sheet
rd
rr
DU
D
D
=
which can be calculated as follows:
= (
C
I
D,c
20 s/F
= upper reset timing threshold at
t
V
D
V C
= reset delay time
= delay capacitors
=
= charge current, typical 14 A
t I
V
DU
D,c
D
, typical 1.8 V
/
C
I
)/
D,c
D
in series with
V
C
I
is necessary for compensation of line influences. The resonant
t
t
rr
rd
is the time it takes the voltage regulator to set the reset out
C
I
. An output capacitor
C
C
D
.
D
C
will be charged with constant current. After the
D
for reset delay time
9
C
D
the reaction time can be estimated
C
Q
is necessary for the stability of
V
C
DU
Q
and the reset output will
22 F and an ESR of
C
D
Rev. 1.8, 2007-11-09
on pin 4 (D) will be
TLE 4270-2
V
DL
, a
(1)
(2)
(3)