CAT1026WI-45-GT3 ON Semiconductor, CAT1026WI-45-GT3 Datasheet - Page 12

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CAT1026WI-45-GT3

Manufacturer Part Number
CAT1026WI-45-GT3
Description
IC SUPERVISOR CPU 2K EEPR 8SOIC
Manufacturer
ON Semiconductor
Type
Multi-Voltage Supervisorr
Datasheet

Specifications of CAT1026WI-45-GT3

Number Of Voltages Monitored
2
Output
Open Drain or Open Collector
Reset
Active High/Active Low
Reset Timeout
130 ms Minimum
Voltage - Threshold
4.5V, Adj
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
CAT1026, CAT1027
Acknowledge Polling
Disabling of the inputs can be used to take
advantage of the typical write cycle time. Once the
stop condition is issued to indicate the end of the
host’s write opration, the CAT1026 and CAT1027
initiates the internal write cycle. ACK polling can be
initiated immediately. This involves issuing the start
condition followed by the slave address for a write
operation. If the device is still busy with the write
operation, no ACK will be returned. If a write
operation has completed, an ACK will be returned
and the host can then proceed with the next read or
write operation.
Figure 10. Immediate Address Read Timing
Doc. No. MD-3010 Rev. P
SDA
SCL
BUS ACTIVIT Y:
SDA LINE
MASTER
DATA OUT
8TH BI T
8
S
S
T
A
R
T
ADDRESS
SLAVE
12
READ OPERATIONS
The READ operation for the CAT1026 and CAT1027 is
initiated in the same manner as the write operation with
one exception, the R/W ¯ ¯ bit is set to one. Three different
READ operations are possible: Immediate/Current
Address
Sequential READ.
9
A
C
K
NO ACK
DATA
READ,
N
O
C
A
K
Selective/Random
P
O
S
T
P
Characteristics subject to change without notice
STOP
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READ
and

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