CAT1026WI-45-GT3 ON Semiconductor, CAT1026WI-45-GT3 Datasheet - Page 11

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CAT1026WI-45-GT3

Manufacturer Part Number
CAT1026WI-45-GT3
Description
IC SUPERVISOR CPU 2K EEPR 8SOIC
Manufacturer
ON Semiconductor
Type
Multi-Voltage Supervisorr
Datasheet

Specifications of CAT1026WI-45-GT3

Number Of Voltages Monitored
2
Output
Open Drain or Open Collector
Reset
Active High/Active Low
Reset Timeout
130 ms Minimum
Voltage - Threshold
4.5V, Adj
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Page Write
The CAT1026 and CAT1027 write up to 16 bytes of
data in a single write cycle, using the Page Write
operation. The page write operation is initiated in the
same manner as the byte write operation, however
instead of terminating after the initial byte is
transmitted, the Master is allowed to send up to 15
additional bytes. After each byte has been transmitted,
the CAT1026 and CAT1027 will respond with an
acknowledge and internally increment the lower order
address bits by one. The high order bits remain
unchanged.
Figure 8. Byte Write Timing
Figure 9: Page Write Timing
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
BUS ACTIVITY:
SDA LINE
MASTER
S
BUS ACTIVITY:
R
S
T
A
T
SDA LINE
ADDRESS
MASTER
SLAVE
S
S
T
A
R
T
A
C
K
ADDRESS (n)
ADDRESS
SLAVE
BYTE
A
C
K
A
C
K
11
If the Master transmits more than 16 bytes before
sending the STOP condition, the address counter
‘wraps around,’ and previously transmitted data will be
overwritten.
When all 16 bytes are received, and the STOP condition
has been sent by the Master, the internal programming
cycle begins. At this point, all received data is written to
the CAT1026 and CAT1027 in a single write cycle.
ADDRESS
BYTE
DATA n
A
C
K
C
A
K
DATA n+1
DATA
A
C
K
A
C
K
P
O
S
T
P
CAT1026, CAT1027
DATA n+15
Doc. No. MD-3010 Rev. P
A
C
K
S
O
P
T
P

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