X40020S14Z-B Intersil, X40020S14Z-B Datasheet - Page 13

• Manufacturer Part Number: X40020S14Z-B
• Description: IC VOLTAGE MONITOR DUAL 14-SOIC
• Manufacturer: Intersil
• Type: Multi-Voltage Supervisorr

Specifications of X40020S14Z-B

• Number Of Voltages Monitored: 2
• Output: Open Drain or Open Collector
• Reset: Active High
• Reset Timeout: Adjustable/Selectable
• Voltage - Threshold: 2.6V, 4.6V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 14-SOIC (3.9mm Width), 14-SOL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Read Operation
Prior to issuing the Slave Address Byte with the R/W bit
set to one, the master must first perform a “dummy” write
operation. The master issues the start condition and the
Slave Address Byte, receives an acknowledge, then
issues the Word Address Bytes. After acknowledging
receipts of the Word Address Bytes, the master immedi-
ately issues another start condition and the Slave
Address Byte with the R/W bit set to one. This is followed
by an acknowledge from the device and then by the eight
bit word. The master terminates the read operation by
not responding with an acknowledge and then issuing a
stop condition. See Figure 12 for the address, acknowl-
edge, and data transfer sequence.
SERIAL DEVICE ADDRESSING
Memory Address Map
CR, Control Register, CR7: CR0
Address: 1FF
FDR, Fault DetectionRegister, FDR7: FDR0
Address: 0FF
Figure 12. Read Sequence
hex
hex
Signals from
Signals from
the Master
the Slave
SDA Bus
13
S
a
t
r
t
1 0 1
Address
Slave
1
0 0
0
A
C
K
1 1 1 1 1 1 1 1
X40020, 40021
Address
Byte
A
C
K
Slave Address Byte
Following a start condition, the master must output a
Slave Address Byte. This byte consists of several parts:
– a device type identifier that is always “1011” when
– two bits of “0”.
– one bit that becomes the MSB of the memory
– last bit of the slave command byte is a R/W bit. The
S
a
t
r
t
accessing the control register and fault detection
register.
address X
R/W bit of the Slave Address Byte defines the oper-
ation to be performed. When the R/W bit is a one,
then a read operation is selected. A zero selects a
write operation. See Figure 13.
Address
Slave
4
.
1
C
A
K
Data
S
o
p
t
May 17, 2006
FN8112.1