MAX6791TPLD2+T Maxim Integrated Products, MAX6791TPLD2+T Datasheet - Page 11

• Manufacturer Part Number: MAX6791TPLD2+T
• Description: IC REG LINEAR DUAL 20-TQFN
• Manufacturer: Maxim Integrated Products
• Type: Regulator/Supervisorr

Specifications of MAX6791TPLD2+T

• Number Of Voltages Monitored: 1
• Output: Open Drain or Open Collector
• Reset: Active Low
• Reset Timeout: 8.75 ms Minimum
• Voltage - Threshold: 4.625V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 20-TQFN Exposed Pad
• Number Of Outputs: 2
• Polarity: Positive
• Input Voltage Max: 72 V
• Output Voltage: 1.8 V to 11 V, 5 V
• Output Type: Adjustable, Fixed
• Dropout Voltage (max): 1.8 V at 150 mA
• Output Current: 150 mA
• Line Regulation: 1 %
• Load Regulation: 1.5 %
• Maximum Power Dissipation: 2.6667 W
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: MAX6791TPLD2+TTR

MAX6791/
MAX6792
13, 14
17, 18
10
11
12
15
16
19
20
—
9
High-Voltage, Micropower, Single/Dual Linear
MAX6793/
MAX6794
13, 14
17, 18
PIN
11
12
15
16
19
20
—
—
9
______________________________________________________________________________________
Regulators with Supervisory Functions
MAX6795/
MAX6796
17, 18
11
12
16
19
—
—
—
—
—
9
ENABLE2
ENABLE1
WD-DIS
GATEP
NAME
WDS1
WDS0
HOLD
OUT2
WDI
PFI
IN
Min/Max Watchdog Logic-Select Input. WDS0 and WDS1 select the watchdog
window ratio or disable the watchdog timer. Drive WDS0 and WDS1 high or
low to select the desired ratio, see Table 4.
Watchdog Input.
M AX 6793–M AX 6796: A fal l i ng or r i si ng tr ansi ti on m ust occur on W D I w i thi n the
sel ected w atchd og ti m eout p er i od or a r eset p ul se occur s. The w atchd og ti m er
cl ear s w hen a tr ansi ti on occur s on WD I or whenever RESET i s asser ted .
MAX6791/MAX6792: W D I fal l i ng and r i si ng tr ansi ti ons w i thi n p er i od s shor ter
than t
p er i od . The w atchd og ti m er b eg i ns to count after RESET i s d easser ted . The
w atchd og ti m er cl ear s w hen a val i d tr ansi ti on occur s on WD I or w henever RES ET
i s asser ted . C onnect W D S 0 hi g h and W D S 1 l ow to d i sab l e the w atchd og ti m er
functi on. S ee the W atchd og Ti m er secti on.
Active-Low Regulator Hold Input. When HOLD is forced low, OUT1/OUT
remains ON even if ENABLE1/ENABLE is pulled low. To shut down the output
of the regulator (OUT/OUT1), release HOLD after ENABLE1/ENABLE is pulled
low. Connect HOLD to OUT1/OUT or leave unconnected if unused. HOLD is
internally connected to OUT/OUT1 through a 2µA current source.
Regulator 2 Output. OUT2 is a fixed +5V output. Connect a 10µF (min)
capacitor from OUT2 to GND.
Active-High Enable Input 2. Drive ENABLE2 high to turn on OUT2. ENABLE2 is
internally connected to ground through a 0.5µA current sink.
Adjustable Power-Fail Comparator Input. Connect PFI to a resistive-divider to
set the desired PFI threshold. The PFI input is referenced to an accurate
1.231V threshold.
Reg ul ator Inp uts. Byp ass IN w i th a 1µF cap aci tor to G N D .
pFET Gate Drive. Connect GATEP to the gate of a p-channel MOSFET to
provide low drop reverse-battery voltage protection.
Active-High Enable Input 1. Drive ENABLE1 high to turn on OUT1. ENABLE1 is
internally connected to ground through a 0.5µA current sink.
Watchdog Disable Input. Drive WD-DIS low to disable the watchdog timer.
Drive WD-DIS high or connect to OUT/OUT1 to enable the watchdog timer.
The watchdog timer clears when reset asserts.
WD 1
or l ong er than t
WD 2
force RESET to asser t l ow for the r eset ti m eout
Pin Description (continued)
FUNCTION
11