STM1001LWX6F STMicroelectronics, STM1001LWX6F Datasheet - Page 7

IC MPU RESET CIRCUIT 4.63V SOT23

STM1001LWX6F

Manufacturer Part Number
STM1001LWX6F
Description
IC MPU RESET CIRCUIT 4.63V SOT23
Manufacturer
STMicroelectronics
Type
Simple Reset/Power-On Resetr
Datasheet

Specifications of STM1001LWX6F

Number Of Voltages Monitored
1
Output
Open Drain or Open Collector
Reset
Active Low
Reset Timeout
140 ms Minimum
Voltage - Threshold
4.63V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
SOT-23-3
Monitored Voltage
3 V, 3.3 V, 5 V
Output Type
Active Low, Open Drain
Manual Reset
Not Resettable
Watchdog
No Watchdog
Battery Backup Switching
No Backup
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.2 V
Supply Current (typ)
15 uA
Maximum Power Dissipation
320 mW
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Power Fail Detection
No
Number Of Elements
1
Monitored Voltage 1 (typ)
3/3.3/5V
Threshold Voltage 1 (max)
4.7V
Watchdog Timer
No
Chip Enable Signals
No
Reset Active Time
280ms
Package Type
SOT-23
Operating Supply Voltage (min)
1.2V
Operating Supply Voltage (max)
5.5V
Reset Threshold Voltage (max)
4.7V
Reset Threshold Voltage (min)
4.56V
Family Name
STM1001
Power Dissipation
320mW
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
3
Supply Current
0.015mA
Undervoltage Threshold
4.56 V
Overvoltage Threshold
4.7 V
Power-up Reset Delay (typ)
280 ms
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-4797-2

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STM1001
2
2.1
2.2
Operation
Reset output
The STM1001 microprocessor reset circuit asserts a reset signal to the MCU whenever V
goes below the reset threshold (V
70 °C).
During power-up, once V
the reset time-out period, t
If V
low for at least the reset time-out period. Any time V
internal timer clears. The reset timer starts when V
active-low reset (RST) is an open drain output.
Negative-going V
The STM1001 is relatively immune to negative-going V
page 10
STM1001 will NOT generate a reset pulse). The graph was generated using a negative
pulse applied to V
by the magnitude indicated (comparator overdrive). The graph indicates the maximum pulse
width a negative V
the transient increases (further below the threshold), the maximum allowable pulse width
decreases. Any combination of duration and overdrive which lies under the curve will NOT
generate a reset signal. Typically, a V
threshold and lasts 20 µs or less will not cause a reset pulse. A 0.1 µF bypass capacitor
mounted as close as possible to the V
CC
drops below the reset threshold, RST goes low. Each time RST is asserted, it stays
shows typical transient duration versus reset comparator overdrive (for which the
CC
CC
, starting at 0.5 V above the actual reset threshold and ending below it
transient can have without causing a reset pulse. As the magnitude of
CC
CC
rec
exceeds the reset threshold an internal timer keeps RST low for
. After this interval, RST returns high.
Doc ID 10373 Rev 6
transients
RST
CC
). RST is guaranteed valid down to V
CC
transient that goes 100 mV below the reset
pin provides additional transient immunity.
CC
CC
returns above the reset threshold. The
CC
goes below the reset threshold, the
transients (glitches).
CC
= 1 V (0° to
Figure 10 on
Operation
7/18
CC

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