AD8556ARZ Analog Devices Inc, AD8556ARZ Datasheet - Page 22

IC AMP CHOPPER 2MHZ 10MA 8SOIC

AD8556ARZ

Manufacturer Part Number
AD8556ARZ
Description
IC AMP CHOPPER 2MHZ 10MA 8SOIC
Manufacturer
Analog Devices Inc
Series
DigiTrim®r
Type
Instrumentation Amplifierr
Datasheets

Specifications of AD8556ARZ

Operating Temperature
-40°C ~ 140°C
Amplifier Type
Chopper (Zero-Drift)
Number Of Circuits
1
Slew Rate
1.2 V/µs
Gain Bandwidth Product
2MHz
Current - Input Bias
49nA
Voltage - Input Offset
2µV
Current - Supply
2mA
Current - Output / Channel
10mA
Voltage - Supply, Single/dual (±)
4.5 V ~ 5.5 V
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
No. Of Amplifiers
1
Bandwidth
700kHz
Rail To Rail I/o Type
Rail-Rail I/O
No. Of Channels
1
Supply Voltage Range
2.7V To 5.5V
Amplifier Case Style
SOIC
No. Of Pins
8
Number Of Channels
1
Number Of Elements
5
Power Supply Requirement
Single
Common Mode Rejection Ratio
80dB
Unity Gain Bandwidth Product (typ)
8MHz
Single Supply Voltage (typ)
5V
Dual Supply Voltage (typ)
Not RequiredV
Power Supply Rejection Ratio
109dB
Rail/rail I/o Type
Rail to Rail Input/Output
Single Supply Voltage (min)
4.5V
Single Supply Voltage (max)
5.5V
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Operating Temp Range
-40C to 140C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
8
Package Type
SOIC N
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Output Type
-
-3db Bandwidth
-
Lead Free Status / Rohs Status
Compliant

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AD8556
Signal PAR_SUM is the output of the 2-input exclusive-OR
gate (Cell EOR2). After the master fuse is blown, set
PARITY_ERROR to PAR_SUM. As mentioned earlier, the
AD8556 behaves as a programmed amplifier when
PARITY_ERROR = 0 (no parity error). On the other hand,
VOUT is connected to VSS when a parity error has been
detected, that is, when PARITY_ERROR = 1.
Read Mode
The values stored by the polysilicon fuses can be sent to the
FILT/DIGOUT pin to verify correct programming. Normally,
the FILT/DIGOUT pin is only connected to the second gain
stage output via RF. During read mode, however, the
FILT/DIGOUT pin is also connected to the output of a shift
register to allow the polysilicon fuse contents to be read. Since
VOUT is a buffered version of FILT/DIGOUT, VOUT also
outputs a digital signal during read mode.
Read mode is entered by setting Field 1 to 11 and selecting the
desired parameter in Field 2. Field 4 is ignored. The parameter
value, stored in the polysilicon fuses, is loaded into an internal
shift register, and the MSB of the shift register is connected to
the FILT/DIGOUT pin. Pulses at DIGIN shift out the shift
register contents to the FILT/DIGOUT pin, allowing the 8‒bit
parameter value to be read after seven additional pulses; shift-
ing occurs on the falling edge of DIGIN. An eighth pulse at
DIGIN disconnects FILT/DIGOUT from the shift register and
terminates the read mode. If a parameter value is less than eight
bits long, the MSBs of the shift register are padded with 0s.
For example, to read the second stage gain, this code is used:
1000 0000 0001 11 00 10 0000 0000 0111 1111 1110
Since the second stage gain parameter value is only three bits
long, the FILT/DIGOUT pin has a value of 0 when this code is
entered, and remains 0 during four additional pulses at DIGIN.
The fifth, sixth, and seventh pulses at DIGIN return the 3-bit
value at FILT/DIGOUT, the seventh pulse returns the LSB. An
eighth pulse at DIGIN terminates the read mode.
Sense Current
A sense current is sent across each polysilicon fuse to determine
whether it has been blown. When the voltage across the fuse is
less than approximately 1.5 V, the fuse is considered not blown,
and Logic 0 is output from the OTP cell. When the voltage
across the fuse is greater than approximately 1.5 V, the fuse is
considered blown, and Logic 1 is output.
When the AD8556 is manufactured, all fuses have a low
resistance. When a sense current is sent through the fuse, a
voltage less than 0.1 V is developed across the fuse. This is
much lower than 1.5 V, so Logic 0 is output from the OTP cell.
When a fuse is electrically blown, it should have a very high
resistance. When the sense current is applied to the blown fuse,
the voltage across the fuse should be larger than 1.5 V, so
Logic 1 is output from the OTP cell.
Rev. 0 | Page 22 of 28
It is theoretically possible, though very unlikely, for a fuse to be
incompletely blown during programming, assuming the
required conditions are met. In this situation, the fuse could
have a medium resistance, neither low nor high, and a voltage of
approximately 1.5 V could be developed across the fuse. Thus,
the OTP cell could output Logic 0 or a Logic 1, depending on
temperature, supply voltage, and other variables.
To detect this undesirable situation, the sense current can be
lowered by a factor of 4 using a specific code. The voltage
developed across the fuse would then change from 1.5 V to
0.38 V, and the output of the OTP would be a Logic 0 instead of
the expected Logic 1 from a blown fuse. Correctly blown fuses
would still output a Logic 1. In this way, incorrectly blown fuses
can be detected. Another specific code would return the sense
current to the normal (larger) value. The sense current cannot
be permanently programmed to the low value. When the
AD8556 is powered up, the sense current defaults to the high
value.
The low sense current code is:
1000 0000 0001 00 00 10 XXXX XXX1 0111 1111 1110
The normal (high) sense current code is:
1000 0000 0001 00 00 10 XXXX XXX0 0111 1111 1110
Programming Procedure
For reliable fuse programming, it is imperative to follow the
programming procedure requirements, especially the proper
supply voltage during programming.
1. When programming the AD8556, the temperature of the
2. Set VDD and VSS to the desired values in the application.
One way to choose these values is to set the output offset
to an approximate value, such as Code 128 for midsupply, to
allow the required gain to be determined. Then set the
second stage gain so the minimum first stage gain (Code 0)
gives a lower gain than required, and the maximum first
stage gain (Code 127) gives a higher gain than required.
After choosing the second stage gain, the first stage gain can
be chosen to fine tune the total gain. Finally, the output
offset can be adjusted to give the desired value. After
determining the desired codes for second stage gain, first
stage gain, and output offset, the device is ready for
permanent programming.
device must be between 10°C to 40°C.
Use simulation mode to test and determine the desired
codes for the second stage gain, first stage gain, and output
offset. The nominal values for these parameters are shown in
Table 5, Table 6, Equation 2, and Equation 3; use the codes
corresponding to these values as a starting point. However,
since actual parameter values for given codes vary from
device to device, some fine tuning is necessary for the best
possible accuracy.

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