AD8055AR Analog Devices Inc, AD8055AR Datasheet - Page 13

IC OPAMP VF LDIST LN LP 8SOIC

AD8055AR

Manufacturer Part Number
AD8055AR
Description
IC OPAMP VF LDIST LN LP 8SOIC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD8055AR

Slew Rate
1400 V/µs
Mounting Type
Surface Mount
Rohs Status
RoHS non-compliant
Amplifier Type
Voltage Feedback
Number Of Circuits
1
-3db Bandwidth
300MHz
Current - Input Bias
400nA
Voltage - Input Offset
3000µV
Current - Supply
5.4mA
Current - Output / Channel
60mA
Voltage - Supply, Single/dual (±)
8 V ~ 12 V, ±4 V ~ 6 V
Operating Temperature
-40°C ~ 125°C
Package / Case
8-SOIC (3.9mm Width)
Op Amp Type
Voltage Feedback
No. Of Amplifiers
1
Bandwidth
300MHz
No. Of Pins
8
Single Supply Voltage Min (+v)
4V
Gain
1dB
Settling Time
20ns
Output Type
-
Gain Bandwidth Product
-
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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POWER DISSIPATION LIMITS
With a 10 V supply (total V
dissipation of the AD8055 in the SOT-23-5 package is 65 mW,
while the quiescent power dissipation of the AD8056 in the
MSOP-8 is 120 mW. This translates into a 15.6°C rise above the
ambient for the SOT-23-5 package and a 24°C rise for the
MSOP-8 package.
The power dissipated under heavy load conditions is
approximately equal to the supply voltage minus the output
voltage, times the load current, plus the quiescent power
previously computed. The total power dissipation is then
multiplied by the thermal resistance of the package to find the
temperature rise, above ambient, of the part. The junction
temperature should be kept below 150°C.
The AD8055 in the SOT-23-5 package can dissipate 270 mW,
while the AD8056 in the MSOP-8 package can dissipate
325 mW (at 85°C ambient) without exceeding the maximum
die temperature. In the case of the AD8056, this is greater than
1.5 V rms into 50 Ω, enough to accommodate a 4 V p-p sine
wave signal on both outputs simultaneously. However, because
each output of the AD8055 or AD8056 is capable of supplying
as much as 110 mA into a short circuit, a continuous short-
circuit condition will exceed the maximum safe junction
temperature.
RESISTOR SELECTION
Table 3 is a guide for resistor selection for maintaining gain
flatness vs. frequency for various values of gain.
Table 3.
Gain
+1
+2
+5
+10
DRIVING CAPACITIVE LOADS
When driving a capacitive load, most op amps exhibit peaking
in the frequency response just before the frequency rolls off.
Figure 39 shows the responses for an AD8056 running at a gain
of +2, with an 100 Ω load that is shunted by various values of
capacitance. It can be seen that under these conditions the part
is still stable with capacitive loads of up to 30 pF.
R
0
402
1 k
909
F
(Ω)
R
402
249
100
G
(Ω)
CC
− V
−3 dB Bandwidth (MHz)
300
160
45
20
EE
), the quiescent power
Rev. J | Page 13 of 16
In general, to minimize peaking or to ensure the stability for
larger values of capacitive loads, a small series resistor, R
be added between the op amp output and the capacitor, C
the setup depicted in Figure 40, the relationship between R
C
chosen to produce less than 1 dB of peaking in the frequency
response. Note also that after a sharp rise, R
approximately 25 Ω.
L
V
was empirically derived and is shown in Figure 41. R
IN
= 0dBm
–1
–2
–3
–4
–5
40
35
30
25
20
15
10
5
4
3
2
1
0
5
0
0.3
0
V
IN
402Ω
= 0dBm
402Ω
10
50Ω
1
Figure 39. Capacitive Load Drive
Figure 40. Setup for R vs. C
50Ω
2
3
402Ω
20
AD8055
C
Figure 41. R vs. C
FREQUENCY (MHz)
L
+5V
–5V
7
4
30
C
10
100Ω
L
402Ω
0.1µF
0.1µF
C
(pF)
6
L
S
C
= 20pF
40
L
= 10pF
C
S
AD8055/AD8056
L
10µF
L
= 0pF
10µF
50
L
S
100
quickly settles to
R
C
S
L
60
= 30pF
FET PROBE
C
L
500
270
V
S
OUT
S
, can
was
L
. For
S
and

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