MCP6S91T-E/SN Microchip Technology, MCP6S91T-E/SN Datasheet

no-image

MCP6S91T-E/SN

Manufacturer Part Number
MCP6S91T-E/SN
Description
IC PGA 1CH R-R I/O SPI 8SOIC
Manufacturer
Microchip Technology
Datasheet

Specifications of MCP6S91T-E/SN

Amplifier Type
Programmable Gain
Number Of Circuits
1
Output Type
Rail-to-Rail
Slew Rate
22 V/µs
-3db Bandwidth
18MHz
Current - Input Bias
1pA
Voltage - Input Offset
400µV
Current - Supply
1mA
Current - Output / Channel
25mA
Voltage - Supply, Single/dual (±)
2.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
No. Of Amplifiers
1
Bandwidth
18MHz
Rail To Rail I/o Type
Rail Rail I/O
No. Of Channels
2
Supply Voltage Range
2.5V To 5.5V
Amplifier Case Style
SOIC
No. Of Pins
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Gain Bandwidth Product
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCP6S91T-E/SN
Manufacturer:
MICROCHIP
Quantity:
12 000
Features
• Multiplexed Inputs: 1 or 2 channels
• 8 Gain Selections:
• Serial Peripheral Interface (SPI
• Rail-to-Rail Input and Output
• Low Gain Error: ±1% (max.)
• Offset Mismatch Between Channels: 0 µV
• High Bandwidth: 1 to 18 MHz (typ.)
• Low Noise: 10 nV/ Hz @ 10 kHz (typ.)
• Low Supply Current: 1.0 mA (typ.)
• Single Supply: 2.5V to 5.5V
• Extended Temperature Range: -40°C to +125°C
Typical Applications
• A/D Converter Driver
• Multiplexed Analog Applications
• Data Acquisition
• Industrial Instrumentation
• Test Equipment
• Medical Instrumentation
Block Diagram
 2004 Microchip Technology Inc.
CH0
CH1
SCK
- +1, +2, +4, +5, +8, +10, +16 or +32 V/V
CS
SO
SI
SPI™
Logic
MUX
Single-Ended, Rail-to-Rail I/O, Low-Gain PGA
V
SS
Switches
Gain
V
DD
8
V
)
REF
R
R
G
F
V
OUT
MCP6S91/2/3
Description
The Microchip Technology Inc. MCP6S91/2/3 are
analog Programmable Gain Amplifiers (PGAs). They
can be configured for gains from +1 V/V to +32 V/V and
the input multiplexer can select one of up to two chan-
nels through a SPI port. The serial interface can also
put the PGA into shutdown to conserve power. These
PGAs are optimized for high-speed, low offset voltage
and single-supply operation with rail-to-rail input and
output capability. These specifications support single-
supply applications needing flexible performance or
multiple inputs.
The one-channel MCP6S91 and the two-channel
MCP6S92 are available in 8-pin PDIP, SOIC and MSOP
packages. The two-channel MCP6S93 is available in a
10-pin MSOP package. All parts are fully specified from
-40°C to +125°C.
Package Types
V
V
V
CH0
CH0
CH1
V
OUT
V
OUT
REF
PDIP, SOIC, MSOP
PDIP, SOIC, MSOP
SS
SS
1
2
3
4
1
2
3
4
MCP6S91
MCP6S92
8
8
7
6
5
7
6
5
V
SCK
SI
CS
V
SCK
SI
CS
DD
DD
V
V
CH0
CH1
OUT
V
REF
SS
1
2
3
4
5
MCP6S93
MSOP
DS21908A-page 1
10
9
8
6
7 SI
V
SCK
SO
CS
DD

Related parts for MCP6S91T-E/SN

MCP6S91T-E/SN Summary of contents

Page 1

... SS  2004 Microchip Technology Inc. MCP6S91/2/3 Description The Microchip Technology Inc. MCP6S91/2/3 are analog Programmable Gain Amplifiers (PGAs). They can be configured for gains from +1 V/V to +32 V/V and the input multiplexer can select one two chan- nels through a SPI port. The serial interface can also put the PGA into shutdown to conserve power ...

Page 2

... Figure 4-1) connects V LAD tied internally REF SS recommended that the MCP6S92’ The MCP6S92’s V and V IVR IVR_REF 3: I includes current in R (typically 60 µ LAD  2004 Microchip Technology Inc. PIN FUNCTION TABLE Name V OUT CH0, CH1 Analog Inputs V REF + 0. – ...

Page 3

... MCP6S92’ The MCP6S92’s V and V IVR IVR_REF 3: I includes current in R (typically 60 µ LAD  2004 Microchip Technology Inc. = +25° +2.5V to +5.5V /2, SI and SCK are tied low and CS is tied high. DD Min Typ Max Units 3.4 4 ...

Page 4

... See Table 4-1 for a list of typical numbers and Figure 2-25 for the frequency response versus gain and e include ladder resistance noise. See Figure 2-12 for  2004 Microchip Technology Inc. = +25° +2.5V to +5.5V / pF, SI and SCK are tied low and CS is tied high. ...

Page 5

... Not tested in production. Set by design and characterization. 2: When using the device in the daisy-chain configuration, maximum clock frequency is determined by a combination of propagation delay time (t DO fall times of 5 ns. Maximum f SCK  2004 Microchip Technology Inc. = 25° +2.5V to +5.5V / pF, SI and SCK are tied low and CS is tied high. ...

Page 6

... Operating Temperature Range Storage Temperature Range Thermal Package Resistances Thermal Resistance, 8L-PDIP Thermal Resistance, 8L-SOIC Thermal Resistance, 8L-MSOP Thermal Resistance, 10L-MSOP Note 1: Operation in this range must not cause T  2004 Microchip Technology Inc. MCP6S91/2/3 = +2.5V to +5.5V GND Sym Min Typ Max ...

Page 7

... PGA Shutdown Timing Diagram (must enter correct commands before CS goes high CSSC SCK (first 16 bits out are always zeros) FIGURE 1-4: Detailed SPI™ Serial Interface Timing; SPI 0,0 Mode.  2004 Microchip Technology Inc OUT FIGURE 1-3: Diagram. t OFF Hi 1/f SCK t ...

Page 8

... –  O_LIN REF SS  2004 Microchip Technology Inc 1/f SCK t DO The end points of this line are – 0.3V. Figure 1-6 shows the relationship between DD the gain and offset specifications referred to in the electrical specifications as follows: EQUATION 1- The DC Gain Drift ( G/ T ...

Page 9

... G G FIGURE 1-7: Output Voltage INL with the standard condition REF SS  2004 Microchip Technology Inc. 1.1.4 DIFFERENT V Some of the plots in Section 2.0 “Typical Performance Curves”, have the conditions The equations and figures above are easily REF DD modified for these conditions. The ideal V ...

Page 10

... DC Gain Error (%) FIGURE 2-2: DC Gain Error, G 16% 597 Samples 14 -40 to +125°C A 12% 10 Ladder Resistance Drift (%/°C) FIGURE 2-3: Ladder Resistance Drift.  2004 Microchip Technology Inc. = +25° +2.5V to +5.5V and pF 35% 600 Samples 30 25% T 20% 15% 10 FIGURE 2-4: 26% 600 Samples ...

Page 11

... Input Offset Voltage Mismatch (µV) FIGURE 2-8: Input Offset Voltage Mismatch. 1000 100 100 1000 0 100 1k Frequency (Hz) FIGURE 2-9: Input Noise Voltage Density vs. Frequency.  2004 Microchip Technology Inc. = +25° +2.5V to +5.5V and pF 24% 22% 20% 18% 16% 14% 12% 10 FIGURE 2-10: 3.0 = 10.0 µ ...

Page 12

... CH0 = V /2 1.E-08 10n 5.5V 1.E- 1.E-10 100p V DD 1.E-11 10p 1p 1.E-12 1.E-13 100f -50 - Ambient Temperature (°C) FIGURE 2-15: Quiescent Current in Shutdown Mode vs. Ambient Temperature.  2004 Microchip Technology Inc. = +25° +2.5V to +5.5V and pF 100 100 125 10 FIGURE 2-16: 10,000 1,000 100 ...

Page 13

... Power Supply Voltage (V) FIGURE 2-20: DC Output Non-Linearity vs. Supply Voltage. 1000 V = 5.5V DD 100 10 1 0.1 1 Output Plus Ladder Current Magnitude (mA) FIGURE 2-21: Output Voltage Headroom vs. Output Plus Ladder Current (circuit in Figure 4-2).  2004 Microchip Technology Inc. = +25° +2.5V to +5.5V and pF ...

Page 14

... Bandwidth vs. Capacitive Load. 1 Measurement kHz V = 2.0V OUT P 5. 0.001 1.5V L 0.0001 1.E+02 1.E+03 1.E+04 100 1k 10k Frequency (Hz) FIGURE 2-27: THD plus Noise vs. Frequency OUT P-P  2004 Microchip Technology Inc. = +25° +2.5V to +5.5V and pF 1.E+08 10 100M FIGURE 2-28: Load + 1000 ...

Page 15

... V is "ON" OUT 0.5 0.0 0.E+00 1.E+00 2.E+00 3.E+00 4.E+00 5.E+00 6.E+00 7.E+00 8.E+00 9.E+00 Time (1 µs/div) FIGURE 2-33: Output Voltage vs. Shutdown Mode.  2004 Microchip Technology Inc. = +25° +2.5V to +5.5V and pF 300 5.0 = 5.0V 250 4.5 200 4.0 150 3.5 100 3 ...

Page 16

... V – – 2.5V: V – – -50 - Ambient Temperature (°C) FIGURE 2-38: Output Voltage Headroom vs. Ambient Temperature.  2004 Microchip Technology Inc. = +25° +2.5V to +5.5V and pF 1 V/V 1.1 V 1.0 0.9 0.8 0.7 0.6 0 +125° 0.2 T 0.1 0.0 2.0 2.5 ...

Page 17

... REF voltage between V and V (the MCP6S92 has tied internally The voltage at this pin REF SS shifts the output voltage.  2004 Microchip Technology Inc. Symbol Description V Analog Output OUT CH0 Analog Input CH1 Analog Input V External Reference Pin REF ...

Page 18

... Reducing the measurement bandwidth will produce a more narrow histogram and give an aver- age closer to 0 µV.  2004 Microchip Technology Inc. 4.2 Internal Op Amp The internal op amp gives the right combination of bandwidth, accuracy and flexibility. ...

Page 19

... Current beyond ±2 mA can cause possible reliability problems. Applications that exceed this rating must be externally limited with an input resistor, as shown in Figure 4-3.  2004 Microchip Technology Inc (Maximum expected V R ...

Page 20

... The resistive ladder is always connected between V and V ; even in shutdown. This means that the REF OUT output resistance will be on the order with a path for output signals to appear at the input.  2004 Microchip Technology Inc. pin must be – 0.3V and SS is REF ). Staying within MCP6S91/2/3 ...

Page 21

... FIGURE 5-2: Serial Bus Sequence for the PGA; SPI™ 1,1 Mode (see Figure 1-5).  2004 Microchip Technology Inc. Chain Configuration”, covers applications using multiple 16-bit words. SO goes low after CS goes high; it has a push-pull output that does not go into a high-Z state ...

Page 22

... Shutdown does not toggle. Legend Readable bit -n = Value at POR  2004 Microchip Technology Inc. After power-up, and when the power supply voltage dips below the minimum valid V nal register data and state machine may need to be reset. This is accomplished as described before. Use ...

Page 23

... Gain of +2 010 = Gain of +4 011 = Gain of +5 100 = Gain of +8 101 = Gain of +10 110 = Gain of +16 111 = Gain of +32 Legend Readable bit -n = Value at POR  2004 Microchip Technology Inc. U-x U-x U-x W-0 — — — Writable bit U = Unimplemented bit, read as ‘0’ ...

Page 24

... Unimplemented: Read as ‘0’ (reserved for future use) bit 0 C0: Channel Select bit MCP6S91 0 = CH0 1 = CH0 Legend Readable bit -n = Value at POR  2004 Microchip Technology Inc. U-x U-x U-x U-x — — — — MCP6S92 MCP6S93 CH0 CH0 ...

Page 25

... Device 1 automatically shifts data from Device 1 to Device 2 (16 clocks). 6. Raise CS. FIGURE 5-3: Daisy-Chain Configuration.  2004 Microchip Technology Inc. MCP6S91/2/3 The example in Figure 5-3 shows a daisy-chain configuration with two devices, although any number of devices can be configured this way. The MCP6S91 and ...

Page 26

... SCK SI Instruction Byte for Device 2 SO (first 16 bits out are always zeros) FIGURE 5-5: Serial Bus Sequence for Daisy-Chain Configuration; SPI™ 1,1 Mode.  2004 Microchip Technology Inc. MCP6S91/2 10111213141516 Data Byte Instruction Byte for Device 1 for Device 2 Instruction Byte ...

Page 27

... Figure 6-2) improves the internal amplifier’s ISO stability by making the load resistive at higher frequencies. The bandwidth will be generally lower than the bandwidth with no capacitive load.  2004 Microchip Technology Inc pin at REF FIGURE 6-2: Capacitive Loads. ...

Page 28

... This capacitor needs to be large enough to overcome gain (or crosstalk) peak- ing, yet small enough to allow a reasonable signal bandwidth.  2004 Microchip Technology Inc. 6.3.4 SIGNAL COUPLING The input pins of the MCP6S91/2/3 family of PGAs are high-impedance. This makes them especially suscepti- ble to capacitively-coupled noise ...

Page 29

... It is also easy to shift the gain range to lower gains (see Figure 6-7). The MCP6291 acts as a unity gain buffer, and the resistive voltage divider shifts the gain range down to +0.1 V/V to +3.2 V/V (from +1 V/V to +32 V/V).  2004 Microchip Technology Inc MCP6291 ...

Page 30

... SPI FIGURE 6-11: Expanded Input for a ® PICmicro Microcontroller.  2004 Microchip Technology Inc. 6.4.7 ADC DRIVER and This family of PGAs is well suited for driving Analog-to- Digital Converters (ADCs). The binary gains ( and 32) effectively add five more bits to the input range (see Figure 6-12) ...

Page 31

... Standard marking consists of Microchip part number, year code, week code, traceability code (facility code, mask rev#, and assembly code). For marking beyond this, certain price adders apply. Please check with your Microchip Sales Office.  2004 Microchip Technology Inc. MCP6S91/2/3 Example: ...

Page 32

... Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-001 Drawing No. C04-018  2004 Microchip Technology Inc ...

Page 33

... Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-012 Drawing No. C04-057  2004 Microchip Technology Inc Units ...

Page 34

... Mold Draft Angle Top Mold Draft Angle Bottom *Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. Drawing No. C04-111  2004 Microchip Technology Inc Units INCHES ...

Page 35

... Lead Width Mold Draft Angle Top Mold Draft Angle Bottom *Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. JEDEC Equivalent: MO-187 Drawing No. C04-021  2004 Microchip Technology Inc φ ...

Page 36

... NOTES:  2004 Microchip Technology Inc. MCP6S91/2/3 DS21908A-page 36 ...

Page 37

... Device Temperature Package Range Device: MCP6S91: One-channel PGA MCP6S91T: One-channel PGA (Tape and Reel for SOIC and MSOP-8) MCP6S92: Two-channel PGA MCP6S92T: Two-channel PGA (Tape and Reel for SOIC and MSOP-8) MCP6S93: Two-channel PGA MCP6S93T: Two-channel PGA (Tape and Reel for MSOP-10) ...

Page 38

... MCP6S91/2/3 NOTES: DS21908A-page 38  2004 Microchip Technology Inc. ...

Page 39

... PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel and Total Endurance are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...

Page 40

... Fax: 65-6334-8850 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Taiwan - Hsinchu Tel: 886-3-572-9526 Fax: 886-3-572-6459  2004 Microchip Technology Inc. EUROPE Austria - Weis Tel: 43-7242-2244-399 Fax: 43-7242-2244-393 Denmark - Ballerup Tel: 45-4420-9895 Fax: 45-4420-9910 France - Massy Tel: 33-1-69-53-63-20 ...

Related keywords