MCP6282-E/SN Microchip Technology, MCP6282-E/SN Datasheet - Page 14

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MCP6282-E/SN

Manufacturer Part Number
MCP6282-E/SN
Description
IC OPAMP 2.2V DUAL R-R 8SOIC
Manufacturer
Microchip Technology
Datasheets

Specifications of MCP6282-E/SN

Slew Rate
2.5 V/µs
Package / Case
8-SOIC (3.9mm Width)
Amplifier Type
General Purpose
Number Of Circuits
2
Output Type
Rail-to-Rail
Gain Bandwidth Product
5MHz
Current - Input Bias
1pA
Voltage - Input Offset
3000µV
Current - Supply
450µA
Current - Output / Channel
25mA
Voltage - Supply, Single/dual (±)
2.2 V ~ 6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Number Of Channels
2
Common Mode Rejection Ratio (min)
70 dB
Input Offset Voltage
3 mV
Input Bias Current (max)
1 pA
Operating Supply Voltage
3 V, 5 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Shutdown
No
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.2 V
Technology
CMOS
Voltage Gain Db
110 dB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
-3db Bandwidth
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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MCP6281/1R/2/3/4/5
4.6
With this family of operational amplifiers, the power
supply pin (V
bypass capacitor (i.e., 0.01 µF to 0.1 µF) within 2 mm
for good, high-frequency performance. It also needs a
bulk capacitor (i.e., 1 µF or larger) within 100 mm to
provide large, slow currents. This bulk capacitor can be
shared with nearby analog parts.
4.7
An unused op amp in a quad package (MCP6284)
should be configured as shown in
circuits prevent the output from toggling and causing
crosstalk. Circuits A sets the op amp at its minimum
noise gain. The resistor divider produces any desired
reference voltage within the output voltage range of the
op amp; the op amp buffers that reference voltage.
Circuit B uses the minimum number of components
and operates as a comparator, but it may draw more
current.
FIGURE 4-6:
4.8
In applications where low input bias current is critical,
Printed Circuit Board (PCB) surface-leakage effects
need to be considered. Surface leakage is caused by
humidity, dust or other contamination on the board.
Under low humidity conditions, a typical resistance
between nearby traces is 10
cause 5 pA of current to flow, which is greater than the
MCP6281/1R/2/3/4/5 family’s bias current at +25°C
(1 pA, typical).
The easiest way to reduce surface leakage is to use a
guard ring around sensitive pins (or traces). The guard
ring is biased at the same voltage as the sensitive pin.
An example of this type of layout is shown in
Figure
DS21811E-page 14
V
DD
¼ MCP6284 (A)
R
R
V
REF
4-7.
1
2
Supply Bypass
Unused Op Amps
PCB Surface Leakage
=
DD
V
V
DD
DD
for single-supply) should have a local
------------------
R
1
R
Unused Op Amps.
+
2
V
R
2
REF
12
Ω. A 5V difference would
Figure
¼ MCP6284 (B)
V
4-6. These
DD
FIGURE 4-7:
for Inverting Gain.
1.
2.
For
Amplifiers (convert current to voltage, such as
photo detectors):
a.
b.
Non-inverting Gain and Unity-Gain Buffer:
a.
b.
Connect the guard ring to the non-inverting
input pin (V
to the same reference voltage as the op
amp (e.g., V
Connect the inverting pin (V
with a wire that does not touch the PCB
surface.
Connect the non-inverting pin (V
input with a wire that does not touch the
PCB surface.
Connect the guard ring to the inverting input
pin (V
common mode input voltage.
Inverting
IN
–). This biases the guard ring to the
V
IN
IN
DD
Guard Ring
Gain
+). This biases the guard ring
Example Guard Ring Layout
© 2008 Microchip Technology Inc.
/2 or ground).
and
V
IN
+
Transimpedance
IN
–) to the input
IN
V
SS
+) to the

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