MCP6S21-I/MS Microchip Technology, MCP6S21-I/MS Datasheet - Page 21

IC PGA 1CH R-R I/O 8MSOP

MCP6S21-I/MS

Manufacturer Part Number
MCP6S21-I/MS
Description
IC PGA 1CH R-R I/O 8MSOP
Manufacturer
Microchip Technology
Datasheet

Specifications of MCP6S21-I/MS

Package / Case
8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
Amplifier Type
Programmable Gain
Number Of Circuits
1
Output Type
Rail-to-Rail
Slew Rate
22 V/µs
-3db Bandwidth
12MHz
Current - Input Bias
1pA
Voltage - Input Offset
275µV
Current - Supply
1mA
Current - Output / Channel
30mA
Voltage - Supply, Single/dual (±)
2.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Number Of Channels
Single
Available Set Gain
30.1 dB (Typ)
Input Offset Voltage
0.275 mV
Input Bias Current (max)
0.000001 uA
Operating Supply Voltage
3 V, 5 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.5 V
No. Of Amplifiers
1
Bandwidth
12MHz
No. Of Channels
1
Supply Voltage Range
2.5V To 5.5V
Amplifier Case Style
MSOP
No. Of Pins
8
Operating Temperature Range
-40°C To +85°C
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Gain Bandwidth Product
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCP6S21-I/MS
Manufacturer:
LT
Quantity:
17
Part Number:
MCP6S21-I/MS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
MCP6S21-I/MS
0
5.2.3
If the instruction register is programmed to address the
channel register, the multiplexed inputs of the
MCP6S22, MCP6S26 and MCP6S28 can be changed
per Register 5-3.
REGISTER 5-3:
2003 Microchip Technology Inc.
bit 7-3
bit 2-0
CHANGING THE CHANNEL
CHANNEL REGISTER
Unimplemented: Read as ‘0’ (reserved for future use)
C2-C0: Channel Select Bits
000 = CH0 (Default)
001 = CH0
001 = CH0
011 = CH0
100 = CH0
101 = CH0
110 = CH0
111 = CH0
Legend:
R = Readable bit
-n = Value at POR
bit 7
U-x
MCP6S21
U-x
MCP6S22
CH0 (Default)
CH1
CH0
CH1
CH0
CH1
CH0
CH1
U-x
W = Writable bit
’1’ = Bit is set
U-x
MCP6S26
CH0 (Default)
CH1
CH2
CH3
CH4
CH5
CH0
CH0
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
U-x
MCP6S21/2/6/8
W-0
C2
MCP6S28
CH0 (Default)
CH1
CH2
CH3
CH4
CH5
CH6
CH7
x = Bit is unknown
W-0
C1
DS21117A-page 21
bit 0
W-0
C0

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