SAK-TC1766-192F80HL BD Infineon Technologies, SAK-TC1766-192F80HL BD Datasheet - Page 111

• Manufacturer Part Number: SAK-TC1766-192F80HL BD
• Description: IC MCU 32BIT FLASH PG-LQFP-176
• Manufacturer: Infineon Technologies
• Series: TC17xxr

Specifications of SAK-TC1766-192F80HL BD

• Core Processor: TriCore
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: ASC, CAN, MLI, MSC, SSC
• Peripherals: DMA, POR, WDT
• Number Of I /o: 81
• Program Memory Size: 1.5MB (1.5M x 8)
• Program Memory Type: FLASH
• Ram Size: 108K x 8
• Voltage - Supply (vcc/vdd): 1.42 V ~ 1.58 V
• Data Converters: A/D 2x10b; A/D 32x8b,10b,12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 176-LFQFP
• Packages: PG-LQFP-176
• Max Clock Frequency: 80.0 MHz
• Sram (incl. Cache): 108.0 KByte
• Can Nodes: 2
• A / D Input Lines (incl. Fadc): 36
• Program Memory: 1.5 MB
• For Use With: B158-H8539-G2-X-7600IN - KIT STARTER TC176X SERIES
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: KT1766192F80HLBDXT; SAK-TC1766-192F80HLBDINTR

Preliminary
4.3.8.2
Table 4-18
Table 4-18
Parameter
FCLP clock period
SOP/ENx outputs delay from FCLP
SDI bit time
SDI rise time
SDI fall time
1) FCLP signal rise/fall times are the same as the A2 Pads rise/fall times.
2) FCLP signal high and low can be minimum 1 ×
3)
Figure 4-18 MSC Interface Timing
Note: The data at SOP should be sampled with the falling edge of FCLP in the target
Data Sheet
T
MSCmin
device.
=
FCLP
SOP
EN
SDI
T
Micro Second Channel (MSC) Interface Timing
SYS
provides the characteristics of the MSC timing in the TC1766.
MSC Interface Timing (Operating Conditions apply), CL = 50 pF
= 1/
f
SYS
1)2)
. When
t
45
f
SYS
= 80MHz,
t
46
t
40
t
40
T
= 25ns
MSC
107
.
Symbol
t
t
t
t
t
40
45
46
48
49
t
48
CC 2 ×
CC -10
SR 8 ×
SR
SR
t
45
t
46
Min.
T
T
Limit Values
MSC
MSC
Electrical Parameters
3)
t
49
MSC_Tmg_1.vsd
Max.
–
10
–
100
100
0.9
0.1
0.9
0.1
V1.0, 2008-04
V
V
V
V
DDP
DDP
TC1766
DDP
DDP
Unit
ns
ns
ns
ns
ns