SAF-XC164N-8F40F BB Infineon Technologies, SAF-XC164N-8F40F BB Datasheet - Page 13

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SAF-XC164N-8F40F BB

Manufacturer Part Number
SAF-XC164N-8F40F BB
Description
IC MCU 16BIT 64KB TQFP-100-16
Manufacturer
Infineon Technologies
Series
XC16xr
Datasheet

Specifications of SAF-XC164N-8F40F BB

Core Processor
C166SV2
Core Size
16-Bit
Speed
40MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
PWM, WDT
Number Of I /o
79
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 2.7 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LFQFP
For Use With
MCBX167-NET - BOARD EVAL INFINEON CAN/ETHRNTMCBXC167-BASIC - BOARD EVAL BASIC INFINEON XC16X
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Other names
FX164N8F40FBBNP
FX164N8F40FBBXP
SAFXC164N8F40FBB
SP000094518
SP000224589
Table 2
Symbol Pin
P3
P3.1
P3.2
P3.3
P3.4
P3.5
P3.6
P3.7
P3.8
P3.9
P3.10
P3.11
P3.12
P3.13
P3.15
Data Sheet
Num.
39
40
41
42
43
44
45
46
47
48
49
50
51
52
Pin Definitions and Functions (cont’d)
Input
Outp.
IO
O
I/O
I
I
I
I
O
O
I
I
I
O
O
I
I
I
I/O
I/O
O
I
I/O
I
O
O
I
I/O
I
O
O
Function
Port 3 is a 14-bit bidirectional I/O port. Each pin can be
programmed for input (output driver in high-impedance
state) or output (configurable as push/pull or open drain
driver). The input threshold of Port 3 is selectable (standard
or special).
The following Port 3 pins also serve for alternate functions:
T6OUT
RxD1
EX1IN
TCK
CAPIN
TDI
T3OUT
TDO
T3EUD
TMS
T4IN
TxD1
BRKOUT
T3IN
T2IN
BRKIN
MRST0
MTSR0
TxD0
EX2IN
RxD0
EX2IN
BHE
WRH
EX3IN
SCLK0
EX3IN
CLKOUT
FOUT
GPT2 Timer T6 Toggle Latch Output,
ASC1 Data Input (Async.) or Inp./Outp. (Sync.),
Fast External Interrupt 1 Input (alternate pin A),
Debug System: JTAG Clock Input
GPT2 Register CAPREL Capture Input,
Debug System: JTAG Data In
GPT1 Timer T3 Toggle Latch Output,
Debug System: JTAG Data Out
GPT1 Timer T3 External Up/Down Control
Input,
Debug System: JTAG Test Mode Selection
GPT1 Timer T4 Count/Gate/Reload/Capture Inp
ASC0 Clock/Data Output (Async./Sync.),
Debug System: Break Out
GPT1 Timer T3 Count/Gate Input
GPT1 Timer T2 Count/Gate/Reload/Capture Inp
Debug System: Break In
SSC0 Master-Receive/Slave-Transmit In/Out.
SSC0 Master-Transmit/Slave-Receive Out/In.
ASC0 Clock/Data Output (Async./Sync.),
Fast External Interrupt 2 Input (alternate pin B)
ASC0 Data Input (Async.) or Inp./Outp. (Sync.),
Fast External Interrupt 2 Input (alternate pin A)
External Memory High Byte Enable Signal,
External Memory High Byte Write Strobe,
Fast External Interrupt 3 Input (alternate pin B)
SSC0 Master Clock Output / Slave Clock Input.,
Fast External Interrupt 3 Input (alternate pin A)
System Clock Output (= CPU Clock),
Programmable Frequency Output
11
General Device Information
Derivatives
V1.2, 2006-08
XC164N

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