SAF-C164CI-L25M CA Infineon Technologies, SAF-C164CI-L25M CA Datasheet - Page 10

• Manufacturer Part Number: SAF-C164CI-L25M CA
• Description: IC MCU 16BIT OTP MQFP-80-1
• Manufacturer: Infineon Technologies
• Series: C16xxr

Specifications of SAF-C164CI-L25M CA

• Core Processor: C166
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, SPI, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 59
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.75 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-SQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: SAFC164CIL25MCAT; SP000014436

Table 2
Symbol Pin
P4
P4.0
P4.1
P4.2
P4.3
P4.5
P4.6
RD
WR/
WRL
ALE
Data Sheet
No.
17
18
19
22
23
24
25
26
27
Pin Definitions and Functions (cont’d)
Input
Outp.
IO
O
O
O
O
O
O
O
O
O
I
O
O
O
O
O
Function
Port 4 is a 6-bit bidirectional I/O port. It is bit-wise
programmable for input or output via direction bits. For a pin
configured as input, the output driver is put into high-
impedance state. Port 4 outputs can be configured as push/
pull or open drain drivers. The input threshold of Port 4 is
selectable (TTL or special).
Port 4 can be used to output the segment address lines, the
optional chip select lines, and for serial interface lines:
A16
CS3
A17
CS2
A18
CS1
A19
CS0
A20
CAN1_RxD CAN 1 Receive Data Input
A21
CAN1_TxD CAN 1 Transmit Data Output
External Memory Read Strobe. RD is activated for every
external instruction or data read access.
External Memory Write Strobe. In WR-mode this pin is
activated for every external data write access. In WRL-mode
this pin is activated for low byte data write accesses on a
16-bit bus, and for every data write access on an 8-bit bus.
See WRCFG in register SYSCON for mode selection.
Address Latch Enable Output. Can be used for latching the
address into external memory or an address latch in the
multiplexed bus modes.
Least Significant Segment Address Line,
Chip Select 3 Output
Segment Address Line,
Chip Select 2 Output
Segment Address Line,
Chip Select 1 Output
Segment Address Line,
Chip Select 0 Output
Segment Address Line,
Most Significant Segment Address Line,
6
C164CL/SL
V2.0, 2001-05
C164CI/SI
1)