MC9S12E256VFUE Freescale Semiconductor, MC9S12E256VFUE Datasheet - Page 427

IC MCU 256K FLASH 25MHZ 80-QFP

MC9S12E256VFUE

Manufacturer Part Number
MC9S12E256VFUE
Description
IC MCU 256K FLASH 25MHZ 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12E256VFUE

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
60
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 2.75 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
80-QFP
Processor Series
S12E
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
60
Number Of Timers
12
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
On-chip Dac
8 bit, 2 Channel
Package
80PQFP
Family Name
HCS12
Maximum Speed
50 MHz
For Use With
M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S12E256VFUE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
13.3.2.14 Timer Input Capture/Output Compare Registers High and Low 4–7
Depending on the TIOS bit for the corresponding channel, these registers are used to latch the value of the
free-running counter when a defined transition is sensed by the corresponding input capture edge detector
or to trigger an output action for output compare.
Read: Anytime
Write: Anytime for output compare function.Writes to these registers have no meaning or effect during
input capture. All timer input capture/output compare registers are reset to 0x0000.
Freescale Semiconductor
Reset
Reset
W
R
W
R
(TCxH and TCxL)
Figure 13-20. Timer Input Capture/Output Compare Register x High (TCxH)
Read/Write access in byte mode for high byte should takes place before low
byte otherwise it will give a different result.
Bit 15
Figure 13-21. Timer Input Capture/Output Compare Register x Low (TCxL)
15
Bit 7
0
0
7
Bit 14
14
Bit 6
0
0
6
MC9S12E256 Data Sheet, Rev. 1.08
Bit 13
11
Bit 5
0
0
5
NOTE
Bit 12
12
Bit 4
0
0
4
Bit 11
11
Bit 3
0
0
3
Chapter 13 Timer Module (TIM16B4CV1)
Bit 10
10
Bit 2
0
0
2
Bit 9
Bit 1
0
9
0
1
Bit 8
Bit 0
0
0
0
0
427

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