MC908GR16ACFAER Freescale Semiconductor, MC908GR16ACFAER Datasheet - Page 70

• Manufacturer Part Number: MC908GR16ACFAER
• Description: IC MCU 16K FLASH 8MHZ 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908GR16ACFAER

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: LIN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 37
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Clock Generator Module (CGM)
4.5.4 PLL Multiplier Select Register Low
The PLL multiplier select register low (PMSL) contains the programming information for the low byte of
the modulo feedback divider.
MUL7–MUL0 — Multiplier Select Bits
4.5.5 PLL VCO Range Select Register
The PLL VCO range select register (PMRS) contains the programming information required for the
hardware configuration of the VCO.
70
These read/write bits control the low byte of the modulo feedback divider that selects the VCO
frequency multiplier, N. (See
be written when the PLLON bit in the PCTL is set. A value of $0000 in the multiplier select registers
configures the modulo feedback divider the same as a value of $0001. Reset initializes the register to
$40 for a default multiply value of 64.
Address:
Address:
For applications using 1–8 MHz reference frequencies this register must be
reprogrammed before enabling the PLL. The reset value of this register will
cause applications using 1–8 MHz reference frequencies to become
unstable if the PLL is enabled without programming an appropriate value.
The programmed value must not allow the VCO clock to exceed 32 MHz.
See
proper value for PMSL.
The multiplier select bits have built-in protection such that they cannot be
written when the PLL is on (PLLON = 1).
Verify that the value of the PMRS register is appropriate for the given
reference and VCO clock frequencies before enabling the PLL. See
Programming the PLL
for these control bits.
Reset:
Reset:
Read:
Read:
Write:
Write:
4.3.6 Programming the PLL
$003A
$0038
Figure 4-7. PLL Multiplier Select Register Low (PMSL)
MUL7
VRS7
Bit 7
Bit 7
Figure 4-8. PLL VCO Range Select Register (PMRS)
0
0
4.3.3 PLL Circuits
MUL6
VRS6
6
1
6
1
MC68HC908GR16A Data Sheet, Rev. 1.0
for detailed instructions on selecting the proper value
MUL5
VRS5
5
0
5
0
for detailed instructions on choosing the
NOTE
NOTE
NOTE
and
MUL4
VRS4
4
0
4
0
4.3.6 Programming the
MUL3
VRS3
3
0
3
0
MUL2
VRS2
2
0
2
0
MUL1
VRS1
PLL.) MUL7–MUL0 cannot
1
0
1
0
Freescale Semiconductor
4.3.6
MUL0
VRS0
Bit 0
Bit 0
0
0