M30263F6AFP#U3 Renesas Electronics America, M30263F6AFP#U3 Datasheet - Page 341
![MCU 3/5V 48K I TEMP PB-FREE 42-S](/photos/28/61/286144/42-ssop_sml.jpg)
M30263F6AFP#U3
Manufacturer Part Number
M30263F6AFP#U3
Description
MCU 3/5V 48K I TEMP PB-FREE 42-S
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/26r
Datasheet
1.M30260F3AGPU5A.pdf
(354 pages)
Specifications of M30263F6AFP#U3
Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, Voltage Detect, WDT
Number Of I /o
33
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
42-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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19.13.14 Definition of Programming/Erasure Times
19.13.15 Flash Memory Version Electrical Characteristics 10,000 E/W cycle products (U7, U9)
19.13.16 Boot Mode
2
9
0 .
B
2 /
"Number of programs and erasure" refers to the number of erasure per block.
If the number of program and erasure is n (n=100 1,000 10,000) each block can be erased n times.
For example, if a 2K byte block A is erased after writing 1 word data 1024 times, each to a different
address, this is counted as one program and erasure. However, data cannot be written to the same
adrress more than once without erasing the block. (Rewrite prohibited)
When Block A or B E/W cycles exceed 100, select one wait state per block access. When FMR17 is set
to "1", one wait state is inserted per access to Block A or B - regardless of the value of PM17. Wait state
insertion during access to all other blocks, as well as to internal RAM, is controlled by PM17 - regardless
of the setting of FMR17.
To use the limited number of erasure efficiently, write to unused address within the block instead of
rewite. Erase block only after all possible address are used. For example, an 8-word program can be
written 128 times before erase becomes necessary.
Maintaining an equal number of erasure between Block A and B will also improve efficiency.
We recommend keeping track of the number of times erasure is used.
An indeterminate value is sometimes output in the I/O port until the internal power supply becomes stable
when "H" is applied to the CNV
When setting the CNV
When the CNV
0
0
6
2
A
0
F
2
e
G
0 -
b
(1) Apply an "L" signal to the RESET pin and the CNV
(2) Bring V
(3) Apply an "H" signal to the CNV
(4) Apply an "H" signal to the RESET pin.
o r
1 .
2
0
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, 5
0
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0
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CC
page 322
pin is “H” and RESET pin is “L”, P6
2 /
6
to more than 2.7V, and wait at least 2msec. (Internal power supply stable waiting time)
, A
SS
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pin to "H", the following procedure is required:
1
f o
6
C
3
2
2 /
SS
9
6
, B
pin and "L" is applied to the RESET pin.
____________
____________
M
1
6
SS
C
2 /
pin.
6
) T
7
pin is connected to the pull-up resister.
SS
_____________
pin.
19. Usage Notes
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