EG80C196EA Intel, EG80C196EA Datasheet - Page 12

• Manufacturer Part Number: EG80C196EA
• Description: IC MPU 16-BIT 5V 40MHZ 160-QFP
• Manufacturer: Intel
• Series: 80Cr

Specifications of EG80C196EA

• Core Processor: MCS 96
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: SIO
• Peripherals: PWM, WDT
• Number Of I /o: 83
• Program Memory Type: ROMless
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: 864391

80C196EA - Commercial
8
Table 4. Signal Descriptions (Sheet 2 of 3)
RD#
READY
RESET#
RXD
TMODE#
TXD
V
V
WR#
WRH#
CC
SS
Name
Type
PWR
GND
I/O
I/O
O
O
O
O
I
I
Read
Read-signal output to external memory. RD# is asserted only during external
memory reads.
Ready Input
This active-high input signal is used to lengthen external memory cycles for slow
memory by generating wait states in addition to the wait states that are generated
internally.
When READY is high, CPU operation continues in a normal manner with wait states
inserted as programmed in the chip configuration registers . READY is ignored for all
internal memory accesses.
Reset
A level-sensitive reset input to and open-drain system reset output from the
microcontroller. Either a falling edge on RESET# or an internal reset turns on a
pull-down transistor connected to the RESET# pin for 16 state times. In the
powerdown and idle modes, asserting RESET# causes the chip to reset and return
to normal operating mode. After a device reset, the first instruction fetch is from
FF2080H.
Receive Serial Data
In modes 1, 2, and 3, RXD receive serial port input data. In mode 0, functions as
either input or open-drain output for data.
Test-Mode Entry
If this pin is held low during reset, the device will enter a test mode. The value of
several other pins defines the actual test mode. All test modes, except test-ROM
execution, are reserved for Intel factory use. If you choose to configure this signal as
an input, always hold it high during reset and ensure that your system meets the V
specification to prevent inadvertent entry into test mode.
TMODE# with P5.4 and BREQ#.
Transmit Serial Data
In serial I/O modes 1, 2, and 3, TXD transmit serial port output data. In mode 0, the
serial clock output.
TXD with .
Digital Supply Voltage
Connect each V
Digital Circuit Ground
These pins supply ground for the digital circuitry. Connect each V
through the lowest possible impedance path.
Write
This active-low output indicates that an external write is occurring. This signal is
asserted only during external memory writes.
WR# is multiplexed with .
† The chip configuration register 0 (CCR0) determines whether this pin functions as
Write High
During 16-bit bus cycles, this active-low output signal is asserted for high-byte writes
and word writes to external memory. During 8-bit bus cycles, WRH# is asserted for
all write operations.
WRH# with BHE#.
† The chip configuration register 0 (CCR0) determines whether this pin functions as
WR# or WRL#. CCR0.2 = 1 selects WR#; CCR0.2 = 0 selects WRL#.
BHE# or WRH#. CCR0.2 = 1 selects BHE#; CCR0.2 = 0 selects WRH#.
†
†
CC
pin to the digital supply voltage.
Description
Preliminary Datasheet
SS
pin to ground
IH