EE80C196MC Intel, EE80C196MC Datasheet - Page 22

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EE80C196MC

Manufacturer Part Number
EE80C196MC
Description
IC MPU 16-BIT 5V 16MHZ 84-PLCC
Manufacturer
Intel
Series
80Cr
Datasheet

Specifications of EE80C196MC

Core Processor
MCS 96
Core Size
16-Bit
Speed
16MHz
Peripherals
PWM, WDT
Number Of I /o
53
Program Memory Type
ROMless
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
84-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Connectivity
-
Other names
863951

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8XC196MC
87C196MC DESIGN
CONSIDERATIONS
When an indirect shift during divide occurs the upper
3 bits of the shift count are not masked completely
If the shift count register has the value 32 n where n
This should have resulted in no shift taking place
DATA SHEET REVISION HISTORY
This data sheet (270946-004) is valid for devices
with a ‘‘B’’ at the end of the topside tracking number
Data sheets are changed as new device information
becomes available Verify with your local Intel sales
office that you have the latest version before finaliz-
ing a design or ordering devices
The following important differences exist between
this data sheet (270946-002) and the previous ver-
sion (270946-003)
1 The data sheet was reorganized to standard for-
2 Added 83C196MC device
3 Added package thermal characteristics
4 Added note on missing pins on SDIP package
5 Removed SFR maps (now in user’s manual)
6 Added note on T
7 Changed 10-bit mode T
8 Changed 10-bit mode T
9 Changed VREF (MIN) in 8- and 10-bit mode to
The following important differences exist between
data sheet 270946-003 and the previous version
(270946-002)
1 The data sheet title was changed to better reflect
2 The standard temperature range for this part now
22
e
1 3 5 or 7 the operand will be shifted 32 times
mat
from 15 0 s
from 18 0 s
4 0V from 4 5V
the purpose of the 87C196MC as an AC Inverter
DC Brushless Motor Control Microcontroller
covers
b
40 C to
LLYV
a
85 C
and T
CONV
CONV
LLGV
(MAX) to 20 0
(MIN) to 10 0
specifications
s
s
3 EXTINT
4 The memory range 01F00H – 01FBFH was added
5 I
6 I
7 The READY description of the READY TIMINGS
10 AD TIME register for 10-bit conversions was
11 The number of sample time states for an 8-bit
12 There is a single entry in the ERRATA section of
The following important differences exist between
this data sheet (270946-002) and the previous ver-
sion (270946-001)
1 T
2 I
3 Testing levels changed from TTL values to
4 A D Input Series Resistance Max changed from
8 AC Testing Input
9 Float Waveform was changed from I
WG PROTECT (1FCEH) as the name and ad-
dress of the register used to select positive neg-
ative or high low detection for EXTINT
to the SFR map as RESERVED
the typical specification was removed
(One Wait State) graphic was modified to denote
the shifting of the leading edge of READY versus
frequency At 16 MHz the falling edge of READY
occurs before the falling edge of ALE
changed from
changed from 5 mA to 2 mA
CMOS values
1 2 K
IL
REF
REF
changed to reflect inputs driven at 3 5V for a
Logic ‘‘1’’ and 45V for a Logic ‘‘0’’ and timing
measurements made at 2 0V for a Logic ‘‘1’’
and 0 8V for a Logic ‘‘0’’
g
changed from 0C7H to 0D8H The number of
sample time states was changed from 24 to 25
states the conversion time states was changed
from 80 to 240 states and the total conversion
time for AD TIME
conversion time for AD TIME
conversion was changed from 20 states to 21
states
this version of the data sheet concerning the
results of an indirect shift during divide
A
changed from
15 mA to I
Ambient Temperature Under Bias Min
changed from 5 mA to 2 mA maximum and
A D Conversion Reference Current Max
to 2 K
function
OL
b
20 C to
I
b
OH s g
60 A to
description
e
Output Waveform was
D8H replaced the total
b
15 mA
40 C
b
70 A
e
now
C7H
OL
includes
I
OH
e

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